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Commit c434b7a6 authored by Natalie Protasevich's avatar Natalie Protasevich Committed by Linus Torvalds
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[PATCH] x86: avoid wasting IRQs for PCI devices 



I have submitted the patch for x86_64, this is submission for i386.

The patch changes the way IRQs are handed out to PCI devices.  Currently,
each I/O APIC pin gets associated with an IRQ, no matter if the pin is used
or not.  This imposes severe limitation on systems that have designs that
employ many I/O APICs, only utilizing couple lines of each, such as P64H2
chipset.  It is used in ES7000, and currently, there is no way to boot the
system with more that 9 I/O APICs.

The simple change below allows to boot a system with say 64 (or more) I/O
APICs, each providing 1 slot, which otherwise impossible because of the IRQ
gaps created for unused lines on each I/O APIC.  It does not resolve the
problem with number of devices that exceeds number of possible IRQs, but
eases up a tension for IRQs on any large system with potentually large
number of devices.

Signed-off-by: default avatarNatalie Protasevich <Natalie.Protasevich@unisys.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent b5d23e5b

arch/i386/kernel/mpparse.c

+25 −1
Original line number Original line Diff line number Diff line
@@ -1058,11 +1058,20 @@ void __init mp_config_acpi_legacy_irqs (void) 
	}

	}

}

}





#define MAX_GSI_NUM	4096



int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)

int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)

{

{

	int			ioapic = -1;

	int			ioapic = -1;

	int			ioapic_pin = 0;

	int			ioapic_pin = 0;

	int			idx, bit = 0;

	int			idx, bit = 0;

	static int		pci_irq = 16;

	/*

	 * Mapping between Global System Interrups, which

	 * represent all possible interrupts, and IRQs

	 * assigned to actual devices.

	 */

	static int		gsi_to_irq[MAX_GSI_NUM];





#ifdef CONFIG_ACPI_BUS

#ifdef CONFIG_ACPI_BUS

	/* Don't set up the ACPI SCI because it's already set up */

	/* Don't set up the ACPI SCI because it's already set up */
@@ -1097,11 +1106,26 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low) 
	if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {

	if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {

		Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",

		Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",

			mp_ioapic_routing[ioapic].apic_id, ioapic_pin);

			mp_ioapic_routing[ioapic].apic_id, ioapic_pin);

		return gsi;

		return gsi_to_irq[gsi];

	}

	}





	mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);

	mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);





	if (edge_level) {

		/*

		 * For PCI devices assign IRQs in order, avoiding gaps

		 * due to unused I/O APIC pins.

		 */

		int irq = gsi;

		if (gsi < MAX_GSI_NUM) {

			gsi = pci_irq++;

			gsi_to_irq[irq] = gsi;

		} else {

			printk(KERN_ERR "GSI %u is too high\n", gsi);

			return gsi;

		}

	}



	io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,

	io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,

		    edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,

		    edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,

		    active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);

		    active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);