Merge "ARM: dts: msm: Add prng ahb clock support on MSM ZIRC"

		qcom,has-sibling;

	};

	gcc_prng_ahb_clk: gcc_prng_ahb_clk {

		compatible = "qcom,local-vote-clk";

		qcom,base-offset = <GCC_PRNG_AHB_CBCR>;

		qcom,en-offset = <GCC_APCS_CLOCK_BRANCH_ENA_VOTE>;

		qcom,en-bit = <8>;

	};

	gcc_sdcc1_ahb_clk: gcc_sdcc1_ahb_clk {

		compatible = "qcom,cbc";

		qcom,base-offset = <GCC_SDCC1_AHB_CBCR>;

			<0x009a &gcc_blsp1_uart4_apps_clk>,

			<0x00d0 &gcc_pdm_ahb_clk>,

			<0x00d2 &gcc_pdm2_clk>,

			<0x00d8 &gcc_prng_ahb_clk>,

			<0x00f8 &gcc_boot_rom_ahb_clk>,

			<0x016A &gcc_a7_debug_clk>,

			<0x0203 &gcc_usb3_axi_tbu_clk>,

#define clk_gcc_mss_cfg_ahb_clk			&gcc_mss_cfg_ahb_clk

#define clk_gcc_mss_q6_bimc_axi_clk		&gcc_mss_q6_bimc_axi_clk

#define clk_gcc_boot_rom_ahb_clk		&gcc_boot_rom_ahb_clk

#define clk_gcc_prng_ahb_clk			&gcc_prng_ahb_clk

/* a7pll */

#define clk_a7pll_clk				&a7pll_clk