Loading drivers/scsi/ufs/ufshcd-pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -92,7 +92,7 @@ static int ufshcd_pci_runtime_idle(struct device *dev) */ static void ufshcd_pci_shutdown(struct pci_dev *pdev) { ufshcd_hba_stop((struct ufs_hba *)pci_get_drvdata(pdev)); ufshcd_hba_stop((struct ufs_hba *)pci_get_drvdata(pdev), true); } /** Loading drivers/scsi/ufs/ufshcd.c +15 −22 Original line number Diff line number Diff line Loading @@ -293,11 +293,12 @@ static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap) * @val - wait condition * @interval_us - polling interval in microsecs * @timeout_ms - timeout in millisecs * * @can_sleep - perform sleep or just spin * Returns -ETIMEDOUT on error, zero on success */ static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms) int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep) { int err = 0; unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); Loading @@ -306,9 +307,10 @@ static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, val = val & mask; while ((ufshcd_readl(hba, reg) & mask) != val) { /* wakeup within 50us of expiry */ if (can_sleep) usleep_range(interval_us, interval_us + 50); else udelay(interval_us); if (time_after(jiffies, timeout)) { if ((ufshcd_readl(hba, reg) & mask) != val) err = -ETIMEDOUT; Loading Loading @@ -1190,7 +1192,7 @@ ufshcd_clear_cmd(struct ufs_hba *hba, int tag) */ err = ufshcd_wait_for_register(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL, mask, ~mask, 1000, 1000); mask, ~mask, 1000, 1000, true); return err; } Loading Loading @@ -2288,18 +2290,9 @@ static int ufshcd_hba_enable(struct ufs_hba *hba) * development and testing of this driver. msleep can be changed to * mdelay and retry count can be reduced based on the controller. */ if (!ufshcd_is_hba_active(hba)) { if (!ufshcd_is_hba_active(hba)) /* change controller state to "reset state" */ ufshcd_hba_stop(hba); /* * This delay is based on the testing done with UFS host * controller FPGA. The delay can be changed based on the * host controller used. */ msleep(5); } ufshcd_hba_stop(hba, true); /* UniPro link is disabled at this point */ ufshcd_set_link_off(hba); Loading Loading @@ -3315,7 +3308,7 @@ static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag) /* poll for max. 1 sec to clear door bell register by h/w */ err = ufshcd_wait_for_register(hba, REG_UTP_TASK_REQ_DOOR_BELL, mask, 0, 1000, 1000); mask, 0, 1000, 1000, true); out: return err; } Loading Loading @@ -3579,7 +3572,7 @@ static int ufshcd_host_reset_and_restore(struct ufs_hba *hba) /* Reset the host controller */ spin_lock_irqsave(hba->host->host_lock, flags); ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, false); spin_unlock_irqrestore(hba->host->host_lock, flags); err = ufshcd_hba_enable(hba); Loading Loading @@ -4541,7 +4534,7 @@ static int ufshcd_link_state_transition(struct ufs_hba *hba, * Change controller state to "reset state" which * should also put the link in off/reset state */ ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, true); /* * TODO: Check if we need any delay to make sure that * controller is reset Loading Loading @@ -4913,7 +4906,7 @@ void ufshcd_remove(struct ufs_hba *hba) scsi_remove_host(hba->host); /* disable interrupts */ ufshcd_disable_intr(hba, hba->intr_mask); ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, true); scsi_host_put(hba->host); Loading drivers/scsi/ufs/ufshcd.h +12 −2 Original line number Diff line number Diff line Loading @@ -465,14 +465,24 @@ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) int ufshcd_alloc_host(struct device *, struct ufs_hba **); int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int); void ufshcd_remove(struct ufs_hba *); int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep); /** * ufshcd_hba_stop - Send controller to reset state * @hba: per adapter instance * @can_sleep: perform sleep or just spin */ static inline void ufshcd_hba_stop(struct ufs_hba *hba) static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) { int err; ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE); err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE, CONTROLLER_ENABLE, CONTROLLER_DISABLE, 10, 1, can_sleep); if (err) dev_err(hba->dev, "%s: Controller disable failed\n", __func__); } static inline void check_upiu_size(void) Loading Loading
drivers/scsi/ufs/ufshcd-pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -92,7 +92,7 @@ static int ufshcd_pci_runtime_idle(struct device *dev) */ static void ufshcd_pci_shutdown(struct pci_dev *pdev) { ufshcd_hba_stop((struct ufs_hba *)pci_get_drvdata(pdev)); ufshcd_hba_stop((struct ufs_hba *)pci_get_drvdata(pdev), true); } /** Loading
drivers/scsi/ufs/ufshcd.c +15 −22 Original line number Diff line number Diff line Loading @@ -293,11 +293,12 @@ static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap) * @val - wait condition * @interval_us - polling interval in microsecs * @timeout_ms - timeout in millisecs * * @can_sleep - perform sleep or just spin * Returns -ETIMEDOUT on error, zero on success */ static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms) int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep) { int err = 0; unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); Loading @@ -306,9 +307,10 @@ static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, val = val & mask; while ((ufshcd_readl(hba, reg) & mask) != val) { /* wakeup within 50us of expiry */ if (can_sleep) usleep_range(interval_us, interval_us + 50); else udelay(interval_us); if (time_after(jiffies, timeout)) { if ((ufshcd_readl(hba, reg) & mask) != val) err = -ETIMEDOUT; Loading Loading @@ -1190,7 +1192,7 @@ ufshcd_clear_cmd(struct ufs_hba *hba, int tag) */ err = ufshcd_wait_for_register(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL, mask, ~mask, 1000, 1000); mask, ~mask, 1000, 1000, true); return err; } Loading Loading @@ -2288,18 +2290,9 @@ static int ufshcd_hba_enable(struct ufs_hba *hba) * development and testing of this driver. msleep can be changed to * mdelay and retry count can be reduced based on the controller. */ if (!ufshcd_is_hba_active(hba)) { if (!ufshcd_is_hba_active(hba)) /* change controller state to "reset state" */ ufshcd_hba_stop(hba); /* * This delay is based on the testing done with UFS host * controller FPGA. The delay can be changed based on the * host controller used. */ msleep(5); } ufshcd_hba_stop(hba, true); /* UniPro link is disabled at this point */ ufshcd_set_link_off(hba); Loading Loading @@ -3315,7 +3308,7 @@ static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag) /* poll for max. 1 sec to clear door bell register by h/w */ err = ufshcd_wait_for_register(hba, REG_UTP_TASK_REQ_DOOR_BELL, mask, 0, 1000, 1000); mask, 0, 1000, 1000, true); out: return err; } Loading Loading @@ -3579,7 +3572,7 @@ static int ufshcd_host_reset_and_restore(struct ufs_hba *hba) /* Reset the host controller */ spin_lock_irqsave(hba->host->host_lock, flags); ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, false); spin_unlock_irqrestore(hba->host->host_lock, flags); err = ufshcd_hba_enable(hba); Loading Loading @@ -4541,7 +4534,7 @@ static int ufshcd_link_state_transition(struct ufs_hba *hba, * Change controller state to "reset state" which * should also put the link in off/reset state */ ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, true); /* * TODO: Check if we need any delay to make sure that * controller is reset Loading Loading @@ -4913,7 +4906,7 @@ void ufshcd_remove(struct ufs_hba *hba) scsi_remove_host(hba->host); /* disable interrupts */ ufshcd_disable_intr(hba, hba->intr_mask); ufshcd_hba_stop(hba); ufshcd_hba_stop(hba, true); scsi_host_put(hba->host); Loading
drivers/scsi/ufs/ufshcd.h +12 −2 Original line number Diff line number Diff line Loading @@ -465,14 +465,24 @@ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) int ufshcd_alloc_host(struct device *, struct ufs_hba **); int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int); void ufshcd_remove(struct ufs_hba *); int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep); /** * ufshcd_hba_stop - Send controller to reset state * @hba: per adapter instance * @can_sleep: perform sleep or just spin */ static inline void ufshcd_hba_stop(struct ufs_hba *hba) static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) { int err; ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE); err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE, CONTROLLER_ENABLE, CONTROLLER_DISABLE, 10, 1, can_sleep); if (err) dev_err(hba->dev, "%s: Controller disable failed\n", __func__); } static inline void check_upiu_size(void) Loading