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Commit c15154a7 authored by Houston Hoffman's avatar Houston Hoffman
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Documentaion: devicetree: NFC: add clocks and interupt naming 



When we upgraded to the 3.10 kernel we started configuring the core
clock and naming our interrupt in the device tree.

Change-Id: If05aa670bf2d6033c1c97f51be991594ae66e4c6
Signed-off-by: default avatarHouston Hoffman <hhoffman@codeaurora.org>
parent 38be2e8f

Documentation/devicetree/bindings/nfc/nfc-nci.txt

+26 −13
Original line number Diff line number Diff line
@@ -13,6 +13,12 @@ Required properties: 
                    that services interrupts for this device.

- interrupts: Nfc read interrupt,gpio-clk-req interrupt





Recommended properties:



- interrupt-names: names of interupts, should include "nfc_irq", used for reference





Optional properties:



- qcom,pwr-req-gpio: pmic gpio to vote for power to be supplied to the uicc
@@ -20,24 +26,31 @@ Optional properties: 
- qcom,clk-req-gpio: clk-req input gpio for MSM based clocks.

                     not used for pmic implementation

- qcom,clk-gpio: pmic or msm gpio on which bbclk2 signal is coming.

- pinctrl-names, pinctrl-0, pincntrl-1: references to our pincntrl settings

- clocks, clock-names: must contain the QCA1990's core clock.



note:

nfc with msm type clock sources (GPCLK and GPCLK 2) require qcom,clk-src-gpio and qcom,clk-req-gpio entries to work propperly.

nfc with pmic type clock sources (BBCLK2 RFCLK3) require the qcom,clk-gpio entry to function properly.

The nfcc needs a core clock supplied in order to respond to nci messages.

The driver currently votes for ref_clk if clock source is set to BBCLK2.  Please ensure the clock indicated by clk-src is defined.





Example:



	i2c@f9925000 { /* BLSP-1 QUP-3 */

	nfc-nci@e {

		compatible = "qcom,nfc-nci";

		reg = <0x0e>;

			qcom,irq-gpio = <&msmgpio 77 0x00>;

			qcom,dis-gpio = <&msmgpio 93 0x00>;

			qcom,clk-src-gpio = <&msmgpio 78 0x00>;

			qcom,clk-src = "BBCLK";

			interrupt-parent = <&msmgpio>;

			interrupts = <77 0>;

			qcom,clk-gpio = <&msmgpio 75 0x00>;

		};

		qcom,irq-gpio = <&msm_gpio 21 0x00>;

		qcom,dis-gpio = <&msm_gpio 20 0x00>;

		qcom,clk-src = "BBCLK2";

		interrupt-parent = <&msm_gpio>;

		interrupts = <21 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active","nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		qcom,clk-gpio = <&pm8916_gpios 2 0>;

		clocks = <&clock_rpm clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};