Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c06663cd authored by Junjie Wu's avatar Junjie Wu
Browse files

clk: qcom: clock-mmss-8994: Add 12MHz support for mclk



Add 12MHz for camera sensor clock to support new sensor module.

Change-Id: I38c790913904dfa072137168cde44f908f7ec1ab
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent dc5a2d4e
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -942,6 +942,7 @@ static struct clk_freq_tbl ftbl_mclk0_clk_src[] = {
	F_MM(   6000000,     mmsscc_gpll0,   10,    1,    10),
	F_MM(   8000000,     mmsscc_gpll0,   15,    1,     5),
	F_MM(   9600000,        mmsscc_xo,    2,    0,     0),
	F_MM(  12000000,     mmsscc_gpll0,   10,    1,     5),
	F_MM(  16000000,  mmpll0_out_main,   10,    1,     5),
	F_MM(  19200000,        mmsscc_xo,    1,    0,     0),
	F_MM(  24000000,     mmsscc_gpll0,    5,    1,     5),
@@ -970,6 +971,7 @@ static struct clk_freq_tbl ftbl_mclk1_clk_src[] = {
	F_MM(   6000000,     mmsscc_gpll0,   10,    1,    10),
	F_MM(   8000000,     mmsscc_gpll0,   15,    1,     5),
	F_MM(   9600000,        mmsscc_xo,    2,    0,     0),
	F_MM(  12000000,     mmsscc_gpll0,   10,    1,     5),
	F_MM(  16000000,  mmpll0_out_main,   10,    1,     5),
	F_MM(  19200000,        mmsscc_xo,    1,    0,     0),
	F_MM(  24000000,     mmsscc_gpll0,    5,    1,     5),
@@ -998,6 +1000,7 @@ static struct clk_freq_tbl ftbl_mclk2_clk_src[] = {
	F_MM(   6000000,     mmsscc_gpll0,   10,    1,    10),
	F_MM(   8000000,     mmsscc_gpll0,   15,    1,     5),
	F_MM(   9600000,        mmsscc_xo,    2,    0,     0),
	F_MM(  12000000,     mmsscc_gpll0,   10,    1,     5),
	F_MM(  16000000,  mmpll0_out_main,   10,    1,     5),
	F_MM(  19200000,        mmsscc_xo,    1,    0,     0),
	F_MM(  24000000,     mmsscc_gpll0,    5,    1,     5),
@@ -1026,6 +1029,7 @@ static struct clk_freq_tbl ftbl_mclk3_clk_src[] = {
	F_MM(   6000000,     mmsscc_gpll0,   10,    1,    10),
	F_MM(   8000000,     mmsscc_gpll0,   15,    1,     5),
	F_MM(   9600000,        mmsscc_xo,    2,    0,     0),
	F_MM(  12000000,     mmsscc_gpll0,   10,    1,     5),
	F_MM(  16000000,  mmpll0_out_main,   10,    1,     5),
	F_MM(  19200000,        mmsscc_xo,    1,    0,     0),
	F_MM(  24000000,     mmsscc_gpll0,    5,    1,     5),