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Commit bedfd154 authored by Roger Quadros's avatar Roger Quadros Committed by Tony Lindgren
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ARM: OMAP3: Fixed spurious IRQ issue for GPIO interrupts 



Flush posted write to IRQSTATUS register in GPIO IRQ handler.
This eliminates the below error for all peripherals that use GPIO interrupts.

<4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31

Signed-off-by: default avatarRoger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent c485ab50

arch/arm/plat-omap/gpio.c

+5 −1
Original line number Diff line number Diff line
@@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) 


	/* Workaround for clearing DSP GPIO interrupts to allow retention */

#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)

	reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;

	if (cpu_is_omap24xx() || cpu_is_omap34xx())

		__raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2);

		__raw_writel(gpio_mask, reg);



	/* Flush posted write for the irq status to avoid spurious interrupts */

	__raw_readl(reg);

#endif

}