Loading arch/arm64/kernel/perf_debug.c +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ static char *descriptions = " 0 arm64: perf: add debug patch logging framework\n" " 1 Perf: arm64: Add L1 counters to tracepoints\n" " 2 Perf: arm64: add support for msm8994v1 irq\n" ; static ssize_t desc_read(struct file *fp, char __user *buf, Loading arch/arm64/kernel/perf_event.c +6 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,8 @@ #include <asm/pmu.h> #include <asm/stacktrace.h> #include <soc/qcom/cti-pmu-irq.h> /* * ARMv8 supports a maximum of 32 events. * The cycle counter is included in this total. Loading Loading @@ -1114,6 +1116,10 @@ irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev) struct pmu_hw_events *cpuc; struct pt_regs *regs; int idx; int cpu = raw_smp_processor_id(); if (msm_pmu_use_irq) msm_cti_pmu_irq_ack(cpu); /* * Get and reset the IRQ flags Loading Loading
arch/arm64/kernel/perf_debug.c +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ static char *descriptions = " 0 arm64: perf: add debug patch logging framework\n" " 1 Perf: arm64: Add L1 counters to tracepoints\n" " 2 Perf: arm64: add support for msm8994v1 irq\n" ; static ssize_t desc_read(struct file *fp, char __user *buf, Loading
arch/arm64/kernel/perf_event.c +6 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,8 @@ #include <asm/pmu.h> #include <asm/stacktrace.h> #include <soc/qcom/cti-pmu-irq.h> /* * ARMv8 supports a maximum of 32 events. * The cycle counter is included in this total. Loading Loading @@ -1114,6 +1116,10 @@ irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev) struct pmu_hw_events *cpuc; struct pt_regs *regs; int idx; int cpu = raw_smp_processor_id(); if (msm_pmu_use_irq) msm_cti_pmu_irq_ack(cpu); /* * Get and reset the IRQ flags Loading