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Commit bb459947 authored by Huaibin Yang's avatar Huaibin Yang Committed by Gerrit - the friendly Code Review server
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msm: mdss: ignore overflow error when trigger BTA for video mode panel



This overflow only happens once after device is out of phy reset state
when BTA is triggered, however, data are still transmitted and BTA
interrupt still returns, indicating that there is nothing wrong with
data and panel. After the first overflow is ignored, there is no such
error any more when s/w trigger more BTAs.

Change-Id: Icb861e2232bda22f8fde008cf8e439594aef6732
Signed-off-by: default avatarHuaibin Yang <huaibiny@codeaurora.org>
parent 33011188
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+33 −7
Original line number Diff line number Diff line
@@ -2352,6 +2352,16 @@ void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl)
		MIPI_OUTP(base + 0x0068, status);
		/* Writing of an extra 0 needed to clear error bits */
		MIPI_OUTP(base + 0x0068, 0);
		/*
		 * After bta done, h/w may have a fake overflow and
		 * that overflow may further cause ack_err about 3 ms
		 * later which is another false alarm. Here the
		 * warning message is ignored.
		 */
		if (ctrl->panel_data.panel_info.esd_check_enabled &&
			(ctrl->status_mode == ESD_BTA) && (status & 0x1008000))
			return;

		pr_err("%s: status=%x\n", __func__, status);
	}
}
@@ -2482,6 +2492,29 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr)

	pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);

	if (isr & DSI_INTR_BTA_DONE) {
		spin_lock(&ctrl->mdp_lock);
		mdss_dsi_disable_irq_nosync(ctrl, DSI_BTA_TERM);
		complete(&ctrl->bta_comp);
		/*
		 * When bta done happens, the panel should be in good
		 * state. However, bta could cause the fake overflow
		 * error for video mode. The similar issue happens when
		 * sending dcs cmd. This overflow further causes
		 * flicking because of phy reset which is unncessary,
		 * so here overflow error is ignored, and errors are
		 * cleared.
		 */
		if (ctrl->panel_data.panel_info.esd_check_enabled &&
			(ctrl->status_mode == ESD_BTA) &&
			(ctrl->panel_mode == DSI_VIDEO_MODE)) {
			isr &= ~DSI_INTR_ERROR;
			/* clear only overflow */
			mdss_dsi_set_reg(ctrl, 0x0c, 0x44440000, 0x44440000);
		}
		spin_unlock(&ctrl->mdp_lock);
	}

	if (isr & DSI_INTR_ERROR) {
		MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x97);
		mdss_dsi_error(ctrl);
@@ -2517,13 +2550,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr)
		spin_unlock(&ctrl->mdp_lock);
	}

	if (isr & DSI_INTR_BTA_DONE) {
		spin_lock(&ctrl->mdp_lock);
		mdss_dsi_disable_irq_nosync(ctrl, DSI_BTA_TERM);
		complete(&ctrl->bta_comp);
		spin_unlock(&ctrl->mdp_lock);
	}

	if (isr & DSI_INTR_DYNAMIC_REFRESH_DONE) {
		spin_lock(&ctrl->mdp_lock);
		mdss_dsi_disable_irq_nosync(ctrl, DSI_DYNAMIC_TERM);