Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b8d7718f authored by Shrenuj Bansal's avatar Shrenuj Bansal
Browse files

msm: kgsl: Remove XPU protected registers from snapshot dump 



Remove the XPU2 register block and certain registers from the
VBIF block since they are XPU protected. Accessing these registers
in snapshot causes XPU violations and device crashes.

CRs-Fixed: 705139
Change-Id: I31527479a029a908fcf85fdf0d16a1afa71fb3b0
Signed-off-by: default avatarShrenuj Bansal <shrenujb@codeaurora.org>
parent e92aa60f

drivers/gpu/msm/adreno_a4xx.c

+29 −2
Original line number Diff line number Diff line
@@ -133,6 +133,33 @@ static const unsigned int a4xx_vbif_ver_20000000_registers[] = { 
	0x67D6, 0x67D6, 0x67EE, 0x67EE,

};



static const unsigned int a4xx_vbif_ver_20020000_registers[] = {

	0x3000, 0x3007, 0x300C, 0x3014, 0x3018, 0x301D, 0x3020, 0x3022,

	0x3024, 0x3026, 0x3028, 0x302A, 0x302C, 0x302D, 0x3030, 0x3031,

	0x3034, 0x3036, 0x3038, 0x3038, 0x303C, 0x303D, 0x3040, 0x3040,

	0x3049, 0x3049, 0x3058, 0x3058, 0x305B, 0x3061, 0x3064, 0x3068,

	0x306C, 0x306D, 0x3080, 0x3088, 0x308B, 0x308C, 0x3090, 0x3094,

	0x3098, 0x3098, 0x309C, 0x309C, 0x30C0, 0x30C0, 0x30C8, 0x30C8,

	0x30D0, 0x30D0, 0x30D8, 0x30D8, 0x30E0, 0x30E0, 0x3100, 0x3100,

	0x3108, 0x3108, 0x3110, 0x3110, 0x3118, 0x3118, 0x3120, 0x3120,

	0x3124, 0x3125, 0x3129, 0x3129, 0x3131, 0x3131, 0x4800, 0x4802,

	0x480F, 0x480F, 0x4811, 0x4811, 0x4813, 0x4813, 0x4815, 0x4816,

	0x482B, 0x482B, 0x4857, 0x4857, 0x4883, 0x4883, 0x48AF, 0x48AF,

	0x48C5, 0x48C5, 0x48E5, 0x48E5, 0x4905, 0x4905, 0x4925, 0x4925,

	0x4945, 0x4945, 0x4950, 0x4950, 0x495B, 0x495B, 0x4980, 0x498E,

	0x4C00, 0x4C00, 0x4D00, 0x4D00, 0x4E00, 0x4E00, 0x4E80, 0x4E80,

	0x4F00, 0x4F00, 0x4F08, 0x4F08, 0x4F10, 0x4F10, 0x4F18, 0x4F18,

	0x4F20, 0x4F20, 0x4F30, 0x4F30, 0x4F60, 0x4F60, 0x4F80, 0x4F81,

	0x4F88, 0x4F89, 0x4FEE, 0x4FEE, 0x4FF3, 0x4FF3, 0x6000, 0x6001,

	0x6008, 0x600F, 0x6014, 0x6016, 0x6018, 0x601B, 0x61FD, 0x61FD,

	0x623C, 0x623C, 0x6380, 0x6380, 0x63A0, 0x63A0, 0x63C0, 0x63C1,

	0x63C8, 0x63C9, 0x63D0, 0x63D4, 0x63D6, 0x63D6, 0x63EE, 0x63EE,

	0x6400, 0x6401, 0x6408, 0x640F, 0x6414, 0x6416, 0x6418, 0x641B,

	0x65FD, 0x65FD, 0x663C, 0x663C, 0x6780, 0x6780, 0x67A0, 0x67A0,

	0x67C0, 0x67C1, 0x67C8, 0x67C9, 0x67D0, 0x67D4, 0x67D6, 0x67D6,

	0x67EE, 0x67EE,

};



static const unsigned int a4xx_vbif_ver_20050000_registers[] = {

	/* VBIF version 0x20050000*/

	0x3000, 0x3007, 0x302C, 0x302C, 0x3030, 0x3030, 0x3034, 0x3036,
@@ -148,8 +175,8 @@ static const unsigned int a4xx_vbif_ver_20050000_registers[] = { 
const struct adreno_vbif_snapshot_registers a4xx_vbif_snapshot_registers[] = {

	{ 0x20000000, a4xx_vbif_ver_20000000_registers,

				ARRAY_SIZE(a4xx_vbif_ver_20000000_registers)/2},

	{ 0x20020000, a4xx_vbif_ver_20000000_registers,

				ARRAY_SIZE(a4xx_vbif_ver_20000000_registers)/2},

	{ 0x20020000, a4xx_vbif_ver_20020000_registers,

				ARRAY_SIZE(a4xx_vbif_ver_20020000_registers)/2},

	{ 0x20050000, a4xx_vbif_ver_20050000_registers,

				ARRAY_SIZE(a4xx_vbif_ver_20050000_registers)/2},

};

drivers/gpu/msm/adreno_a4xx_snapshot.c

+1 −1
Original line number Diff line number Diff line
@@ -402,7 +402,7 @@ void a4xx_snapshot(struct adreno_device *adreno_dev, 
	_snapshot_a3xx_regs(regs, &list, a4xx_sp_tp_registers,

			a4xx_sp_tp_registers_count, 0);



	if (!adreno_is_a405(adreno_dev)) {

	if (!adreno_is_a405(adreno_dev) && !adreno_is_a430(adreno_dev)) {

		_snapshot_a3xx_regs(regs, &list, a4xx_xpu_registers,

				a4xx_xpu_reg_cnt, 1);

	}