Loading arch/arm/boot/dts/msm8974.dtsi +24 −4 Original line number Diff line number Diff line Loading @@ -492,6 +492,7 @@ <78 512 800000 1600000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; qcom,dat1-mpm-int = <42>; status = "disable"; }; Loading @@ -518,6 +519,7 @@ <81 512 800000 1600000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; qcom,dat1-mpm-int = <44>; status = "disable"; }; Loading @@ -525,8 +527,17 @@ compatible = "qcom,sdhci-msm"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 127 0>, <0 224 0>; interrupt-names = "hc_irq", "pwr_irq"; #address-cells = <0>; interrupt-parent = <&sdhc_3>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 127 0 1 &intc 0 224 0 2 &msmgpio 37 0x8>; interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; gpios = <&msmgpio 40 0>, /* CLK */ <&msmgpio 39 0>, /* CMD */ <&msmgpio 38 0>, /* DATA0 */ Loading Loading @@ -558,8 +569,17 @@ compatible = "qcom,sdhci-msm"; reg = <0xf98e4900 0x11c>, <0xf98e4000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 129 0>, <0 227 0>; interrupt-names = "hc_irq", "pwr_irq"; #address-cells = <0>; interrupt-parent = <&sdhc_4>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 129 0 1 &intc 0 227 0 2 &msmgpio 95 0x8>; interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; gpios = <&msmgpio 93 0>, /* CLK */ <&msmgpio 91 0>, /* CMD */ <&msmgpio 96 0>, /* DATA0 */ Loading Loading
arch/arm/boot/dts/msm8974.dtsi +24 −4 Original line number Diff line number Diff line Loading @@ -492,6 +492,7 @@ <78 512 800000 1600000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; qcom,dat1-mpm-int = <42>; status = "disable"; }; Loading @@ -518,6 +519,7 @@ <81 512 800000 1600000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; qcom,dat1-mpm-int = <44>; status = "disable"; }; Loading @@ -525,8 +527,17 @@ compatible = "qcom,sdhci-msm"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 127 0>, <0 224 0>; interrupt-names = "hc_irq", "pwr_irq"; #address-cells = <0>; interrupt-parent = <&sdhc_3>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 127 0 1 &intc 0 224 0 2 &msmgpio 37 0x8>; interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; gpios = <&msmgpio 40 0>, /* CLK */ <&msmgpio 39 0>, /* CMD */ <&msmgpio 38 0>, /* DATA0 */ Loading Loading @@ -558,8 +569,17 @@ compatible = "qcom,sdhci-msm"; reg = <0xf98e4900 0x11c>, <0xf98e4000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 129 0>, <0 227 0>; interrupt-names = "hc_irq", "pwr_irq"; #address-cells = <0>; interrupt-parent = <&sdhc_4>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 129 0 1 &intc 0 227 0 2 &msmgpio 95 0x8>; interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; gpios = <&msmgpio 93 0>, /* CLK */ <&msmgpio 91 0>, /* CMD */ <&msmgpio 96 0>, /* DATA0 */ Loading