Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b5a12967 authored by Tianyi Gou's avatar Tianyi Gou
Browse files

ARM: dts: msm: Add voter clocks for ce clocks on MSM ZIRC 



Both qcedev and qcrypto drivers need to vote on the ce
clocks. Therefore, create the voter clocks for them to
allow aggregation of their requests.

In addition, export the phandles for these ce clocks
to allow the clients use them.

Change-Id: I4f026dae7c802a96d10692be1bf74028156fb080
Signed-off-by: default avatarTianyi Gou <tgou@codeaurora.org>
parent 52817fb1

arch/arm/boot/dts/qcom/msmzirc-cc.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -279,6 +279,18 @@ 
		qcom,key = "KHz";

		qcom,rpm-peer = <&ce_clk>;

	};



	qcedev_ce_clk: qcedev_ce_clk {

		compatible = "qcom,sw-vote-clk";

		qcom,parent = <&ce_clk>;

		qcom,config-rate = <85710000>;

	};



	qcrypto_ce_clk: qcrypto_ce_clk {

		compatible = "qcom,sw-vote-clk";

		qcom,parent = <&ce_clk>;

		qcom,config-rate = <85710000>;

	};

};



&clock_gcc {

include/dt-bindings/clock/msm-clocks-zirc.h

+4 −0
Original line number Diff line number Diff line
@@ -36,6 +36,10 @@ 
#define clk_qpic_a_clk			&qpic_a_clk

#define clk_ln_bb_clk			&ln_bb_clk

#define clk_cxo_dwc3_clk		&cxo_dwc3_clk

#define clk_ce_clk			&ce_clk

#define clk_ce_a_clk			&ce_a_clk

#define clk_qcedev_ce_clk		&qcedev_ce_clk

#define clk_qcrypto_ce_clk		&qcrypto_ce_clk



/* clock_gcc controlled clocks */

#define clk_gpll0				&gpll0