Loading Documentation/devicetree/bindings/iommu/msm_iommu_v1.txt +2 −1 Original line number Diff line number Diff line Loading @@ -3,6 +3,8 @@ Required properties: - compatible : one of: - "qcom,msm-smmu-v1" - "qcom,msm-smmu-v2" - "qcom,msm-mmu-500" - reg : - offset and length of the register set for the device. - Optional offset and length for clock register for additional clock that needs to be turned on for access to this IOMMU. Loading Loading @@ -31,7 +33,6 @@ Optional properties: - qcom,iommu-pmu-ncounters: Number of PMU counters per group. - qcom,iommu-pmu-event-classes: List of event classes supported. - Bus scaling properties: See msm_bus.txt - qcom,no-atos-support: boolean indicating that IOMMU doesn't have ATS support - qcom,cb-base-offset: context bank 0's base address from global base address - List of sub nodes, one for each of the translation context banks supported. Loading drivers/iommu/msm_iommu-v1.c +1 −1 Original line number Diff line number Diff line Loading @@ -1058,7 +1058,7 @@ static phys_addr_t msm_iommu_iova_to_phys(struct iommu_domain *domain, struct msm_iommu_ctx_drvdata, attached_elm); iommu_drvdata = dev_get_drvdata(ctx_drvdata->pdev->dev.parent); if (iommu_drvdata->no_atos_support) { if (iommu_drvdata->model == MMU_500) { ret = msm_iommu_iova_to_phys_soft(domain, va); mutex_unlock(&msm_iommu_lock); return ret; Loading drivers/iommu/msm_iommu_dev-v1.c +6 −5 Original line number Diff line number Diff line Loading @@ -341,6 +341,9 @@ static int msm_iommu_probe(struct platform_device *pdev) drvdata->glb_base = drvdata->base; if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-mmu-500")) drvdata->model = MMU_500; if (of_get_property(pdev->dev.of_node, "vdd-supply", NULL)) { drvdata->gdsc = devm_regulator_get(&pdev->dev, "vdd"); Loading Loading @@ -379,9 +382,6 @@ static int msm_iommu_probe(struct platform_device *pdev) return PTR_ERR(drvdata->aiclk); } drvdata->no_atos_support = of_property_read_bool(pdev->dev.of_node, "qcom,no-atos-support"); if (!of_property_read_u32(pdev->dev.of_node, "qcom,cb-base-offset", &temp)) Loading @@ -408,8 +408,9 @@ static int msm_iommu_probe(struct platform_device *pdev) if (ret) return ret; dev_info(&pdev->dev, "device %s mapped at %p, with %d ctx banks\n", drvdata->name, drvdata->base, drvdata->ncb); dev_info(&pdev->dev, "device %s (model: %d) mapped at %p, with %d ctx banks\n", drvdata->name, drvdata->model, drvdata->base, drvdata->ncb); platform_set_drvdata(pdev, drvdata); Loading include/linux/qcom_iommu.h +8 −1 Original line number Diff line number Diff line Loading @@ -135,7 +135,7 @@ struct msm_iommu_drvdata { unsigned int bus_client; int needs_rem_spinlock; int powered_on; int no_atos_support; unsigned int model; }; /** Loading Loading @@ -229,6 +229,13 @@ enum dump_reg_type { DRT_GLOBAL_REG_N, }; enum model_id { QSMMUv1 = 1, QSMMUv2, MMU_500 = 500, MAX_MODEL, }; struct dump_regs_tbl_entry { /* * To keep things context-bank-agnostic, we only store the Loading Loading
Documentation/devicetree/bindings/iommu/msm_iommu_v1.txt +2 −1 Original line number Diff line number Diff line Loading @@ -3,6 +3,8 @@ Required properties: - compatible : one of: - "qcom,msm-smmu-v1" - "qcom,msm-smmu-v2" - "qcom,msm-mmu-500" - reg : - offset and length of the register set for the device. - Optional offset and length for clock register for additional clock that needs to be turned on for access to this IOMMU. Loading Loading @@ -31,7 +33,6 @@ Optional properties: - qcom,iommu-pmu-ncounters: Number of PMU counters per group. - qcom,iommu-pmu-event-classes: List of event classes supported. - Bus scaling properties: See msm_bus.txt - qcom,no-atos-support: boolean indicating that IOMMU doesn't have ATS support - qcom,cb-base-offset: context bank 0's base address from global base address - List of sub nodes, one for each of the translation context banks supported. Loading
drivers/iommu/msm_iommu-v1.c +1 −1 Original line number Diff line number Diff line Loading @@ -1058,7 +1058,7 @@ static phys_addr_t msm_iommu_iova_to_phys(struct iommu_domain *domain, struct msm_iommu_ctx_drvdata, attached_elm); iommu_drvdata = dev_get_drvdata(ctx_drvdata->pdev->dev.parent); if (iommu_drvdata->no_atos_support) { if (iommu_drvdata->model == MMU_500) { ret = msm_iommu_iova_to_phys_soft(domain, va); mutex_unlock(&msm_iommu_lock); return ret; Loading
drivers/iommu/msm_iommu_dev-v1.c +6 −5 Original line number Diff line number Diff line Loading @@ -341,6 +341,9 @@ static int msm_iommu_probe(struct platform_device *pdev) drvdata->glb_base = drvdata->base; if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-mmu-500")) drvdata->model = MMU_500; if (of_get_property(pdev->dev.of_node, "vdd-supply", NULL)) { drvdata->gdsc = devm_regulator_get(&pdev->dev, "vdd"); Loading Loading @@ -379,9 +382,6 @@ static int msm_iommu_probe(struct platform_device *pdev) return PTR_ERR(drvdata->aiclk); } drvdata->no_atos_support = of_property_read_bool(pdev->dev.of_node, "qcom,no-atos-support"); if (!of_property_read_u32(pdev->dev.of_node, "qcom,cb-base-offset", &temp)) Loading @@ -408,8 +408,9 @@ static int msm_iommu_probe(struct platform_device *pdev) if (ret) return ret; dev_info(&pdev->dev, "device %s mapped at %p, with %d ctx banks\n", drvdata->name, drvdata->base, drvdata->ncb); dev_info(&pdev->dev, "device %s (model: %d) mapped at %p, with %d ctx banks\n", drvdata->name, drvdata->model, drvdata->base, drvdata->ncb); platform_set_drvdata(pdev, drvdata); Loading
include/linux/qcom_iommu.h +8 −1 Original line number Diff line number Diff line Loading @@ -135,7 +135,7 @@ struct msm_iommu_drvdata { unsigned int bus_client; int needs_rem_spinlock; int powered_on; int no_atos_support; unsigned int model; }; /** Loading Loading @@ -229,6 +229,13 @@ enum dump_reg_type { DRT_GLOBAL_REG_N, }; enum model_id { QSMMUv1 = 1, QSMMUv2, MMU_500 = 500, MAX_MODEL, }; struct dump_regs_tbl_entry { /* * To keep things context-bank-agnostic, we only store the Loading