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Commit b4f72b89 authored by Liron Kuch's avatar Liron Kuch
Browse files

msm: tsc: set rates for serial and parallel clock



Set rates of TSC serial and parallel clocks to their appropriate values.
This is required for proper operation.

Change-Id: I3b889f827b9522306926188752849442a8047be6
Signed-off-by: default avatarLiron Kuch <lkuch@codeaurora.org>
parent 70979abc
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+17 −0
Original line number Diff line number Diff line
@@ -67,6 +67,9 @@ module_param(tsc_iommu_bypass, int, S_IRUGO | S_IWUSR | S_IWGRP);
#define CICAM_CLK_RATE_12MHZ		12000000
#define CICAM_CLK_RATE_9MHZ		8971962
#define CICAM_CLK_RATE_7MHZ		7218045
/* Rates for TSC serial and parallel clocks */
#define TSC_SER_CLK_RATE		192000000
#define TSC_PAR_CLK_RATE		24000000

/*
 * TSC register offsets
@@ -1667,6 +1670,20 @@ static int tsc_mux_power_on_clocks(void)
		goto err_set_rate;
	}

	/* Setting the TSC serial clock rate */
	ret = clk_set_rate(tsc_device->ser_clk, TSC_SER_CLK_RATE);
	if (ret != 0) {
		pr_err("%s: Can't set rate for tsc serial clock", __func__);
		goto err_set_rate;
	}

	/* Setting the TSC parallel clock rate */
	ret = clk_set_rate(tsc_device->par_clk, TSC_PAR_CLK_RATE);
	if (ret != 0) {
		pr_err("%s: Can't set rate for tsc parallel clock", __func__);
		goto err_set_rate;
	}

	/* Enabling the clocks */
	ret = clk_prepare_enable(tsc_device->ser_clk);
	if (ret != 0) {