Loading drivers/pwm/pwm-qpnp.c +46 −37 Original line number Diff line number Diff line /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -118,11 +118,6 @@ do { \ #define QPNP_PWM_EN_RAMP_GEN_SHIFT 1 #define QPNP_PWM_EN_RAMP_GEN_MASK 0x02 #define QPNP_ENABLE_PWM(value) \ (value |= (1 << QPNP_EN_PWM_OUTPUT_SHIFT) & QPNP_EN_PWM_OUTPUT_MASK) #define QPNP_DISABLE_PWM(value) (value &= ~QPNP_EN_PWM_OUTPUT_MASK) /* LPG Control for PWM_SYNC */ #define QPNP_PWM_SYNC_VALUE 0x01 #define QPNP_PWM_SYNC_MASK 0x01 Loading Loading @@ -369,23 +364,33 @@ static inline void qpnp_set_pwm_type_config(u8 *val, bool glitch, QPNP_EN_GLITCH_REMOVAL_MASK; } static int qpnp_set_control(bool pwm_hi, bool pwm_lo, bool pwm_out, bool pwm_src, bool ramp_gen) static int qpnp_set_control(struct qpnp_pwm_chip *chip, bool pwm_hi, bool pwm_lo, bool pwm_out, bool pwm_src, bool ramp_gen) { return (ramp_gen << QPNP_PWM_EN_RAMP_GEN_SHIFT) | (pwm_src << QPNP_PWM_SRC_SELECT_SHIFT) | (pwm_out << QPNP_EN_PWM_OUTPUT_SHIFT) | (pwm_lo << QPNP_EN_PWM_LO_SHIFT) | (pwm_hi << QPNP_EN_PWM_HIGH_SHIFT); } #define QPNP_ENABLE_LUT_CONTROL qpnp_set_control(0, 0, 0, 0, 1) #define QPNP_ENABLE_PWM_CONTROL qpnp_set_control(0, 0, 0, 1, 0) #define QPNP_ENABLE_PWM_MODE qpnp_set_control(1, 1, 1, 1, 0) #define QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL qpnp_set_control(1, 1, 1, 1, 1) #define QPNP_ENABLE_LPG_MODE qpnp_set_control(1, 1, 1, 0, 1) #define QPNP_DISABLE_PWM_MODE qpnp_set_control(0, 0, 0, 1, 0) #define QPNP_DISABLE_LPG_MODE qpnp_set_control(0, 0, 0, 0, 1) int value; value = (ramp_gen << QPNP_PWM_EN_RAMP_GEN_SHIFT) | (pwm_src << QPNP_PWM_SRC_SELECT_SHIFT) | (pwm_lo << QPNP_EN_PWM_LO_SHIFT) | (pwm_hi << QPNP_EN_PWM_HIGH_SHIFT); if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) value |= (pwm_out << QPNP_EN_PWM_OUTPUT_SHIFT); return value; } #define QPNP_ENABLE_LUT_CONTROL(chip) \ qpnp_set_control((chip), 0, 0, 0, 0, 1) #define QPNP_ENABLE_PWM_CONTROL(chip) \ qpnp_set_control((chip), 0, 0, 0, 1, 0) #define QPNP_ENABLE_PWM_MODE(chip) \ qpnp_set_control((chip), 1, 1, 1, 1, 0) #define QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL(chip) \ qpnp_set_control((chip), 1, 1, 1, 1, 1) #define QPNP_ENABLE_LPG_MODE(chip) \ qpnp_set_control((chip), 1, 1, 1, 0, 1) #define QPNP_DISABLE_PWM_MODE(chip) \ qpnp_set_control((chip), 0, 0, 0, 1, 0) #define QPNP_DISABLE_LPG_MODE(chip) \ qpnp_set_control((chip), 0, 0, 0, 0, 1) #define QPNP_IS_PWM_CONFIG_SELECTED(val) (val & QPNP_PWM_SRC_SELECT_MASK) #define QPNP_ENABLE_PWM_MODE_ONLY_SUB_TYPE 0x80 Loading Loading @@ -763,11 +768,12 @@ static int qpnp_configure_pwm_control(struct qpnp_pwm_chip *chip) if (chip->sub_type == QPNP_PWM_MODE_ONLY_SUB_TYPE) return 0; value = QPNP_ENABLE_PWM_CONTROL; value = QPNP_ENABLE_PWM_CONTROL(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; return qpnp_lpg_save_and_write(value, mask, &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL], Loading @@ -781,11 +787,12 @@ static int qpnp_configure_lpg_control(struct qpnp_pwm_chip *chip) struct qpnp_lpg_config *lpg_config = &chip->lpg_config; u8 value, mask; value = QPNP_ENABLE_LUT_CONTROL; value = QPNP_ENABLE_LUT_CONTROL(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; return qpnp_lpg_save_and_write(value, mask, &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL], Loading Loading @@ -1045,17 +1052,18 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, reg1 = &chip->qpnp_lpg_registers[QPNP_RAMP_CONTROL]; reg2 = &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL]; mask2 = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask2 |= QPNP_EN_PWM_OUTPUT_MASK; if (chip->sub_type == QPNP_LPG_CHAN_SUB_TYPE && chip->revision == QPNP_LPG_REVISION_0) { if (state == QPNP_LUT_ENABLE) { QPNP_ENABLE_LUT_V0(value1); value2 = QPNP_ENABLE_LPG_MODE; value2 = QPNP_ENABLE_LPG_MODE(chip); } else { QPNP_DISABLE_LUT_V0(value1); value2 = QPNP_DISABLE_LPG_MODE; value2 = QPNP_DISABLE_LPG_MODE(chip); } mask1 = QPNP_RAMP_START_MASK; addr1 = SPMI_LPG_REG_ADDR(lpg_config->base_addr, Loading @@ -1066,9 +1074,9 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, if (state == QPNP_LUT_ENABLE) { QPNP_ENABLE_LUT_V1(value1, lpg_config->lut_config.ramp_index); value2 = QPNP_ENABLE_LPG_MODE; value2 = QPNP_ENABLE_LPG_MODE(chip); } else { value2 = QPNP_DISABLE_LPG_MODE; value2 = QPNP_DISABLE_LPG_MODE(chip); } mask1 = value1; addr1 = lpg_config->lut_base_addr + Loading Loading @@ -1105,8 +1113,8 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, static inline int qpnp_enable_pwm_mode(struct qpnp_pwm_chip *chip) { if (chip->pwm_config.supported_sizes == QPNP_PWM_SIZE_7_8_BIT) return QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL; return QPNP_ENABLE_PWM_MODE; return QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL(chip); return QPNP_ENABLE_PWM_MODE(chip); } static int qpnp_lpg_configure_pwm_state(struct qpnp_pwm_chip *chip, Loading @@ -1128,11 +1136,12 @@ static int qpnp_lpg_configure_pwm_state(struct qpnp_pwm_chip *chip, if (state == QPNP_PWM_ENABLE) value = qpnp_enable_pwm_mode(chip); else value = QPNP_DISABLE_PWM_MODE; value = QPNP_DISABLE_PWM_MODE(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; } if (chip->in_test_mode) { Loading Loading
drivers/pwm/pwm-qpnp.c +46 −37 Original line number Diff line number Diff line /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -118,11 +118,6 @@ do { \ #define QPNP_PWM_EN_RAMP_GEN_SHIFT 1 #define QPNP_PWM_EN_RAMP_GEN_MASK 0x02 #define QPNP_ENABLE_PWM(value) \ (value |= (1 << QPNP_EN_PWM_OUTPUT_SHIFT) & QPNP_EN_PWM_OUTPUT_MASK) #define QPNP_DISABLE_PWM(value) (value &= ~QPNP_EN_PWM_OUTPUT_MASK) /* LPG Control for PWM_SYNC */ #define QPNP_PWM_SYNC_VALUE 0x01 #define QPNP_PWM_SYNC_MASK 0x01 Loading Loading @@ -369,23 +364,33 @@ static inline void qpnp_set_pwm_type_config(u8 *val, bool glitch, QPNP_EN_GLITCH_REMOVAL_MASK; } static int qpnp_set_control(bool pwm_hi, bool pwm_lo, bool pwm_out, bool pwm_src, bool ramp_gen) static int qpnp_set_control(struct qpnp_pwm_chip *chip, bool pwm_hi, bool pwm_lo, bool pwm_out, bool pwm_src, bool ramp_gen) { return (ramp_gen << QPNP_PWM_EN_RAMP_GEN_SHIFT) | (pwm_src << QPNP_PWM_SRC_SELECT_SHIFT) | (pwm_out << QPNP_EN_PWM_OUTPUT_SHIFT) | (pwm_lo << QPNP_EN_PWM_LO_SHIFT) | (pwm_hi << QPNP_EN_PWM_HIGH_SHIFT); } #define QPNP_ENABLE_LUT_CONTROL qpnp_set_control(0, 0, 0, 0, 1) #define QPNP_ENABLE_PWM_CONTROL qpnp_set_control(0, 0, 0, 1, 0) #define QPNP_ENABLE_PWM_MODE qpnp_set_control(1, 1, 1, 1, 0) #define QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL qpnp_set_control(1, 1, 1, 1, 1) #define QPNP_ENABLE_LPG_MODE qpnp_set_control(1, 1, 1, 0, 1) #define QPNP_DISABLE_PWM_MODE qpnp_set_control(0, 0, 0, 1, 0) #define QPNP_DISABLE_LPG_MODE qpnp_set_control(0, 0, 0, 0, 1) int value; value = (ramp_gen << QPNP_PWM_EN_RAMP_GEN_SHIFT) | (pwm_src << QPNP_PWM_SRC_SELECT_SHIFT) | (pwm_lo << QPNP_EN_PWM_LO_SHIFT) | (pwm_hi << QPNP_EN_PWM_HIGH_SHIFT); if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) value |= (pwm_out << QPNP_EN_PWM_OUTPUT_SHIFT); return value; } #define QPNP_ENABLE_LUT_CONTROL(chip) \ qpnp_set_control((chip), 0, 0, 0, 0, 1) #define QPNP_ENABLE_PWM_CONTROL(chip) \ qpnp_set_control((chip), 0, 0, 0, 1, 0) #define QPNP_ENABLE_PWM_MODE(chip) \ qpnp_set_control((chip), 1, 1, 1, 1, 0) #define QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL(chip) \ qpnp_set_control((chip), 1, 1, 1, 1, 1) #define QPNP_ENABLE_LPG_MODE(chip) \ qpnp_set_control((chip), 1, 1, 1, 0, 1) #define QPNP_DISABLE_PWM_MODE(chip) \ qpnp_set_control((chip), 0, 0, 0, 1, 0) #define QPNP_DISABLE_LPG_MODE(chip) \ qpnp_set_control((chip), 0, 0, 0, 0, 1) #define QPNP_IS_PWM_CONFIG_SELECTED(val) (val & QPNP_PWM_SRC_SELECT_MASK) #define QPNP_ENABLE_PWM_MODE_ONLY_SUB_TYPE 0x80 Loading Loading @@ -763,11 +768,12 @@ static int qpnp_configure_pwm_control(struct qpnp_pwm_chip *chip) if (chip->sub_type == QPNP_PWM_MODE_ONLY_SUB_TYPE) return 0; value = QPNP_ENABLE_PWM_CONTROL; value = QPNP_ENABLE_PWM_CONTROL(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; return qpnp_lpg_save_and_write(value, mask, &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL], Loading @@ -781,11 +787,12 @@ static int qpnp_configure_lpg_control(struct qpnp_pwm_chip *chip) struct qpnp_lpg_config *lpg_config = &chip->lpg_config; u8 value, mask; value = QPNP_ENABLE_LUT_CONTROL; value = QPNP_ENABLE_LUT_CONTROL(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; return qpnp_lpg_save_and_write(value, mask, &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL], Loading Loading @@ -1045,17 +1052,18 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, reg1 = &chip->qpnp_lpg_registers[QPNP_RAMP_CONTROL]; reg2 = &chip->qpnp_lpg_registers[QPNP_ENABLE_CONTROL]; mask2 = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask2 |= QPNP_EN_PWM_OUTPUT_MASK; if (chip->sub_type == QPNP_LPG_CHAN_SUB_TYPE && chip->revision == QPNP_LPG_REVISION_0) { if (state == QPNP_LUT_ENABLE) { QPNP_ENABLE_LUT_V0(value1); value2 = QPNP_ENABLE_LPG_MODE; value2 = QPNP_ENABLE_LPG_MODE(chip); } else { QPNP_DISABLE_LUT_V0(value1); value2 = QPNP_DISABLE_LPG_MODE; value2 = QPNP_DISABLE_LPG_MODE(chip); } mask1 = QPNP_RAMP_START_MASK; addr1 = SPMI_LPG_REG_ADDR(lpg_config->base_addr, Loading @@ -1066,9 +1074,9 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, if (state == QPNP_LUT_ENABLE) { QPNP_ENABLE_LUT_V1(value1, lpg_config->lut_config.ramp_index); value2 = QPNP_ENABLE_LPG_MODE; value2 = QPNP_ENABLE_LPG_MODE(chip); } else { value2 = QPNP_DISABLE_LPG_MODE; value2 = QPNP_DISABLE_LPG_MODE(chip); } mask1 = value1; addr1 = lpg_config->lut_base_addr + Loading Loading @@ -1105,8 +1113,8 @@ static int qpnp_lpg_configure_lut_state(struct qpnp_pwm_chip *chip, static inline int qpnp_enable_pwm_mode(struct qpnp_pwm_chip *chip) { if (chip->pwm_config.supported_sizes == QPNP_PWM_SIZE_7_8_BIT) return QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL; return QPNP_ENABLE_PWM_MODE; return QPNP_ENABLE_PWM_MODE_GPLED_CHANNEL(chip); return QPNP_ENABLE_PWM_MODE(chip); } static int qpnp_lpg_configure_pwm_state(struct qpnp_pwm_chip *chip, Loading @@ -1128,11 +1136,12 @@ static int qpnp_lpg_configure_pwm_state(struct qpnp_pwm_chip *chip, if (state == QPNP_PWM_ENABLE) value = qpnp_enable_pwm_mode(chip); else value = QPNP_DISABLE_PWM_MODE; value = QPNP_DISABLE_PWM_MODE(chip); mask = QPNP_EN_PWM_HIGH_MASK | QPNP_EN_PWM_LO_MASK | QPNP_EN_PWM_OUTPUT_MASK | QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; QPNP_PWM_SRC_SELECT_MASK | QPNP_PWM_EN_RAMP_GEN_MASK; if (chip->sub_type != QPNP_LPG_S_CHAN_SUB_TYPE) mask |= QPNP_EN_PWM_OUTPUT_MASK; } if (chip->in_test_mode) { Loading