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Commit ae1f1056 authored by Anirudh Ghayal's avatar Anirudh Ghayal
Browse files

power: qpnp-vm-bms: Add extra logic to read STATUS1 register 



For a synchronized read of the STATUS1 register, it needs
a write followed by a minimum 10ms delay. Perform these
operations before reading the register.

Change-Id: I370566d467d0a76a17412979ccad770dd8187780
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent f537ef9a

drivers/power/qpnp-vm-bms.c

+11 −0
Original line number Diff line number Diff line
@@ -640,6 +640,17 @@ static int update_fsm_state(struct qpnp_bms_chip *chip) 
	u8 val = 0;

	int rc;



	/*

	 * To read the STATUS1 register, write a value(any) to this register,

	 * wait for 10ms and then read the register.

	 */

	rc = qpnp_write_wrapper(chip, &val, chip->base + STATUS1_REG, 1);

	if (rc) {

		pr_err("Unable to write STATUS1_REG rc=%d\n", rc);

		return rc;

	}

	usleep_range(10000, 11000);



	/* read the current FSM state */

	rc = qpnp_read_wrapper(chip, &val, chip->base + STATUS1_REG, 1);

	if (rc) {