Loading drivers/video/msm/mdss/mdss_dsi.c +3 −0 Original line number Diff line number Diff line Loading @@ -1254,6 +1254,9 @@ static int mdss_dsi_event_handler(struct mdss_panel_data *pdata, rc = mdss_dsi_register_recovery_handler(ctrl_pdata, (struct mdss_intf_recovery *)arg); break; case MDSS_EVENT_INTF_RESTORE: mdss_dsi_ctrl_phy_restore(ctrl_pdata); break; default: pr_debug("%s: unhandled event=%d\n", __func__, event); break; Loading drivers/video/msm/mdss/mdss_dsi.h +1 −1 Original line number Diff line number Diff line Loading @@ -440,7 +440,7 @@ void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_init(struct device *ctrl_dev, struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_mdp_busy(struct mdss_dsi_ctrl_pdata *ctrl); Loading drivers/video/msm/mdss/mdss_dsi_host.c +103 −0 Original line number Diff line number Diff line Loading @@ -434,6 +434,109 @@ void mdss_dsi_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl, bool restore) } } void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl) { struct mdss_dsi_ctrl_pdata *ctrl0, *ctrl1; u32 ln0, ln1, ln_ctrl0, ln_ctrl1, i; /* * Add delay suggested by HW team. */ u32 loop = 10; if (ctrl->ndx == DSI_CTRL_1) return; pr_debug("MDSS DSI CTRL PHY restore. ctrl-num = %d\n", ctrl->ndx); ctrl0 = mdss_dsi_get_ctrl_by_index(DSI_CTRL_0); if (mdss_dsi_split_display_enabled()) { ctrl1 = mdss_dsi_get_ctrl_by_index(DSI_CTRL_1); if (!ctrl1) return; ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(28)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 & ~BIT(28)); /* * Toggle Clk lane Force TX stop so that * clk lane status is no more in stop state */ ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); ln1 = MIPI_INP(ctrl1->ctrl_base + 0x00a8); pr_debug("%s: lane status, ctrl0 = 0x%x, ctrl1 = 0x%x\n", __func__, ln0, ln1); if ((ln0 == 0x1f0f) || (ln1 == 0x1f0f)) { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(20)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 | BIT(20)); for (i = 0; i < loop; i++) { ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); ln1 = MIPI_INP(ctrl1->ctrl_base + 0x00a8); if ((ln0 == 0x1f1f) && (ln1 == 0x1f1f)) break; else /* * check clk lane status for every 1 * milli second */ udelay(1000); } pr_debug("%s: lane ctrl, ctrl0 = 0x%x, ctrl1 = 0x%x\n", __func__, ln0, ln1); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(20)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 & ~BIT(20)); } ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(28)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 | BIT(28)); } else { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(28)); /* * Toggle Clk lane Force TX stop so that * clk lane status is no more in stop state */ ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); pr_debug("%s: lane status, ctrl0 = 0x%x\n", __func__, ln0); if (ln0 == 0x1f0f) { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(20)); for (i = 0; i < loop; i++) { ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); if (ln0 == 0x1f1f) break; else /* * check clk lane status for every 1 * milli second */ udelay(1000); } pr_debug("%s: lane ctrl, ctrl0 = 0x%x\n", __func__, ln0); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(20)); } ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(28)); } } static void mdss_dsi_ctl_phy_reset(struct mdss_dsi_ctrl_pdata *ctrl) { u32 data0, data1; Loading drivers/video/msm/mdss/mdss_mdp_intf_cmd.c +4 −0 Original line number Diff line number Diff line Loading @@ -775,6 +775,10 @@ int mdss_mdp_cmd_kickoff(struct mdss_mdp_ctl *ctl, void *arg) if (sctx) mdss_mdp_irq_enable(MDSS_MDP_IRQ_PING_PONG_COMP, sctx->pp_num); if (ctl->mdata->mdp_rev == MDSS_MDP_HW_REV_105 || ctl->mdata->mdp_rev == MDSS_MDP_HW_REV_109) mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_INTF_RESTORE, NULL); mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_START, 1); /* Kickoff */ mdss_mdp_ctl_perf_set_transaction_status(ctl, Loading drivers/video/msm/mdss/mdss_panel.h +3 −0 Original line number Diff line number Diff line Loading @@ -177,6 +177,8 @@ struct mdss_intf_recovery { * - 1: update to command mode * @MDSS_EVENT_REGISTER_RECOVERY_HANDLER: Event to recover the interface in * case there was any errors detected. * @MDSS_EVENT_INTF_RESTORE: Event to restore the interface in case there * was any errors detected during normal operation. */ enum mdss_intf_events { MDSS_EVENT_RESET = 1, Loading @@ -198,6 +200,7 @@ enum mdss_intf_events { MDSS_EVENT_DSI_STREAM_SIZE, MDSS_EVENT_DSI_DYNAMIC_SWITCH, MDSS_EVENT_REGISTER_RECOVERY_HANDLER, MDSS_EVENT_INTF_RESTORE, }; struct lcd_panel_info { Loading Loading
drivers/video/msm/mdss/mdss_dsi.c +3 −0 Original line number Diff line number Diff line Loading @@ -1254,6 +1254,9 @@ static int mdss_dsi_event_handler(struct mdss_panel_data *pdata, rc = mdss_dsi_register_recovery_handler(ctrl_pdata, (struct mdss_intf_recovery *)arg); break; case MDSS_EVENT_INTF_RESTORE: mdss_dsi_ctrl_phy_restore(ctrl_pdata); break; default: pr_debug("%s: unhandled event=%d\n", __func__, event); break; Loading
drivers/video/msm/mdss/mdss_dsi.h +1 −1 Original line number Diff line number Diff line Loading @@ -440,7 +440,7 @@ void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_init(struct device *ctrl_dev, struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_mdp_busy(struct mdss_dsi_ctrl_pdata *ctrl); Loading
drivers/video/msm/mdss/mdss_dsi_host.c +103 −0 Original line number Diff line number Diff line Loading @@ -434,6 +434,109 @@ void mdss_dsi_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl, bool restore) } } void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl) { struct mdss_dsi_ctrl_pdata *ctrl0, *ctrl1; u32 ln0, ln1, ln_ctrl0, ln_ctrl1, i; /* * Add delay suggested by HW team. */ u32 loop = 10; if (ctrl->ndx == DSI_CTRL_1) return; pr_debug("MDSS DSI CTRL PHY restore. ctrl-num = %d\n", ctrl->ndx); ctrl0 = mdss_dsi_get_ctrl_by_index(DSI_CTRL_0); if (mdss_dsi_split_display_enabled()) { ctrl1 = mdss_dsi_get_ctrl_by_index(DSI_CTRL_1); if (!ctrl1) return; ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(28)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 & ~BIT(28)); /* * Toggle Clk lane Force TX stop so that * clk lane status is no more in stop state */ ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); ln1 = MIPI_INP(ctrl1->ctrl_base + 0x00a8); pr_debug("%s: lane status, ctrl0 = 0x%x, ctrl1 = 0x%x\n", __func__, ln0, ln1); if ((ln0 == 0x1f0f) || (ln1 == 0x1f0f)) { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(20)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 | BIT(20)); for (i = 0; i < loop; i++) { ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); ln1 = MIPI_INP(ctrl1->ctrl_base + 0x00a8); if ((ln0 == 0x1f1f) && (ln1 == 0x1f1f)) break; else /* * check clk lane status for every 1 * milli second */ udelay(1000); } pr_debug("%s: lane ctrl, ctrl0 = 0x%x, ctrl1 = 0x%x\n", __func__, ln0, ln1); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(20)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 & ~BIT(20)); } ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); ln_ctrl1 = MIPI_INP(ctrl1->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(28)); MIPI_OUTP(ctrl1->ctrl_base + 0x0ac, ln_ctrl1 | BIT(28)); } else { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(28)); /* * Toggle Clk lane Force TX stop so that * clk lane status is no more in stop state */ ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); pr_debug("%s: lane status, ctrl0 = 0x%x\n", __func__, ln0); if (ln0 == 0x1f0f) { ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(20)); for (i = 0; i < loop; i++) { ln0 = MIPI_INP(ctrl0->ctrl_base + 0x00a8); if (ln0 == 0x1f1f) break; else /* * check clk lane status for every 1 * milli second */ udelay(1000); } pr_debug("%s: lane ctrl, ctrl0 = 0x%x\n", __func__, ln0); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 & ~BIT(20)); } ln_ctrl0 = MIPI_INP(ctrl0->ctrl_base + 0x00ac); MIPI_OUTP(ctrl0->ctrl_base + 0x0ac, ln_ctrl0 | BIT(28)); } } static void mdss_dsi_ctl_phy_reset(struct mdss_dsi_ctrl_pdata *ctrl) { u32 data0, data1; Loading
drivers/video/msm/mdss/mdss_mdp_intf_cmd.c +4 −0 Original line number Diff line number Diff line Loading @@ -775,6 +775,10 @@ int mdss_mdp_cmd_kickoff(struct mdss_mdp_ctl *ctl, void *arg) if (sctx) mdss_mdp_irq_enable(MDSS_MDP_IRQ_PING_PONG_COMP, sctx->pp_num); if (ctl->mdata->mdp_rev == MDSS_MDP_HW_REV_105 || ctl->mdata->mdp_rev == MDSS_MDP_HW_REV_109) mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_INTF_RESTORE, NULL); mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_START, 1); /* Kickoff */ mdss_mdp_ctl_perf_set_transaction_status(ctl, Loading
drivers/video/msm/mdss/mdss_panel.h +3 −0 Original line number Diff line number Diff line Loading @@ -177,6 +177,8 @@ struct mdss_intf_recovery { * - 1: update to command mode * @MDSS_EVENT_REGISTER_RECOVERY_HANDLER: Event to recover the interface in * case there was any errors detected. * @MDSS_EVENT_INTF_RESTORE: Event to restore the interface in case there * was any errors detected during normal operation. */ enum mdss_intf_events { MDSS_EVENT_RESET = 1, Loading @@ -198,6 +200,7 @@ enum mdss_intf_events { MDSS_EVENT_DSI_STREAM_SIZE, MDSS_EVENT_DSI_DYNAMIC_SWITCH, MDSS_EVENT_REGISTER_RECOVERY_HANDLER, MDSS_EVENT_INTF_RESTORE, }; struct lcd_panel_info { Loading