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Commit ac1f7b5f authored by Shalaj Jain's avatar Shalaj Jain Committed by Neeti Desai
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ARM: dts: msm: Add new SIDs and SID mask for venus SMRs on 8994



Venus SMMU SIDs have changed on 8994 as part of
new venus 2.5 h/w. Some of the SIDs now need a mask
to map the SIDs to the Stream Mapping Table Entries.

Change-Id: I59e11b608c2cc94605804c28e72a79aa3ea2eea1
Signed-off-by: default avatarShalaj Jain <shalajj@codeaurora.org>
Signed-off-by: default avatarNeeti Desai <neetid@codeaurora.org>
parent b28a099e
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+13 −4
Original line number Diff line number Diff line
@@ -182,19 +182,27 @@
				0x0>;

	venus_ns: qcom,iommu-ctx@fdc8c000 {
		qcom,iommu-ctx-sids = <0 1 2 3 4 5 7>;
		qcom,iommu-ctx-sids = <0x00 0x21 0x45 0x47 0x48 0x49 0x4a
					0x4b 0x4c 0x65 0x67 0x69 0x6a 0x6b>;
		qcom,iommu-sid-mask = <0x0 0xf 0x0 0x0 0x0 0x0 0x0
					0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
	};

	venus_sec_bitstream: qcom,iommu-ctx@fdc8d000 {
		qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>;
		qcom,iommu-ctx-sids = <0x400 0x421 0x422 0x423 0x424 0x448
					0x44a 0x46a>;
		label = "venus_sec_bitstream";
	};

	venus_fw: qcom,iommu-ctx@fdc8e000 {
		qcom,iommu-ctx-sids = <0x600 0x606>;
	};

	venus_sec_pixel: qcom,iommu-ctx@fdc8f000 {
		compatible = "qcom,msm-smmu-v1-ctx";
		reg = <0xfdc8f000 0x1000>;
		interrupts = <0 42 0>, <0 43 0>;
		qcom,iommu-ctx-sids = <0x85>;
		qcom,iommu-ctx-sids = <0x425 0x428 0x445 0x44c 0x465>;
		label = "venus_sec_pixel";
		qcom,secure-context;
	};
@@ -203,7 +211,8 @@
		compatible = "qcom,msm-smmu-v1-ctx";
		reg = <0xfdc90000 0x1000>;
		interrupts = <0 42 0>, <0 43 0>;
		qcom,iommu-ctx-sids = <0x87 0xA0>;
		qcom,iommu-ctx-sids = <0x427 0x447 0x449 0x44b 0x467 0x469 0x46b
					0x500>;
		label = "venus_sec_non_pixel";
		qcom,secure-context;
	};