Merge branch 'next-i2c-mpc-v8' into next-i2c (aaa02ab5) · Commits · e / devices / android_kernel_sony_msm8994

Documentation/powerpc/dts-bindings/fsl/i2c.txt

+22 −8

Original line number	Diff line number	Diff line
		@@ -2,15 +2,14 @@

		Required properties :

		- device_type : Should be "i2c"
		- reg : Offset and length of the register set for the device
		- compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
		compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
		mpc5200 or mpc5200b. For the mpc5121, an additional node
		"fsl,mpc5121-i2c-ctrl" is required as shown in the example below.

		Recommended properties :

		- compatible : compatibility list with 2 entries, the first should
		be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
		e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
		should be "fsl-i2c".
		- interrupts : <a b> where a is the interrupt number and b is a
		field that represents an encoding of the sense and level
		information for the interrupt. This should be encoded based on
		@@ -24,25 +23,40 @@ Recommended properties :

		Examples :

		/* MPC5121 based board */
		i2c@1740 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,mpc5121-i2c", "fsl-i2c";
		reg = <0x1740 0x20>;
		interrupts = <11 0x8>;
		interrupt-parent = <&ipic>;
		clock-frequency = <100000>;
		};

		i2ccontrol@1760 {
		compatible = "fsl,mpc5121-i2c-ctrl";
		reg = <0x1760 0x8>;
		};

		/* MPC5200B based board */
		i2c@3d00 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
		cell-index = <0>;
		reg = <0x3d00 0x40>;
		interrupts = <2 15 0>;
		interrupt-parent = <&mpc5200_pic>;
		fsl,preserve-clocking;
		};

		/* MPC8544 base board */
		i2c@3100 {
		#address-cells = <1>;
		#size-cells = <0>;
		cell-index = <1>;
		compatible = "fsl,mpc8544-i2c", "fsl-i2c";
		reg = <0x3100 0x100>;
		interrupts = <43 2>;
		interrupt-parent = <&mpic>;
		clock-frequency = <400000>;
		};

drivers/i2c/busses/Kconfig

+3 −4

Original line number	Diff line number	Diff line
		@@ -419,13 +419,12 @@ config I2C_IXP2000
		instead.

		config I2C_MPC
		tristate "MPC107/824x/85xx/52xx/86xx"
		tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
		depends on PPC32
		help
		If you say yes to this option, support will be included for the
		built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
		MPC85xx/MPC8641 family processors. The driver may also work on 52xx
		family processors, though interrupts are known not to work.
		built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
		MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.

		This driver can also be built as a module. If so, the module
		will be called i2c-mpc.

drivers/i2c/busses/i2c-mpc.c

+121 −73

Original line number	Diff line number	Diff line
		@@ -31,6 +31,9 @@

		#define DRV_NAME "mpc-i2c"

		#define MPC_I2C_CLOCK_LEGACY 0
		#define MPC_I2C_CLOCK_PRESERVE (~0U)

		#define MPC_I2C_FDR 0x04
		#define MPC_I2C_CR 0x08
		#define MPC_I2C_SR 0x0c
		@@ -66,9 +69,8 @@ struct mpc_i2c_divider {
		u16 fdr; /* including dfsrr */
		};

		struct mpc_i2c_match_data {
		void (setclock)(struct device_node node,
		struct mpc_i2c *i2c,
		struct mpc_i2c_data {
		void (setup)(struct device_node node, struct mpc_i2c *i2c,
		u32 clock, u32 prescaler);
		u32 prescaler;
		};
		@@ -164,8 +166,8 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
		return 0;
		}

		#ifdef CONFIG_PPC_MPC52xx
		static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
		#if defined(CONFIG_PPC_MPC52xx) \|\| defined(CONFIG_PPC_MPC512x)
		static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
		{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
		{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
		{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
		@@ -186,14 +188,15 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
		{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
		};

		int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
		static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
		int prescaler)
		{
		const struct mpc_i2c_divider *div = NULL;
		unsigned int pvr = mfspr(SPRN_PVR);
		u32 divider;
		int i;

		if (!clock)
		if (clock == MPC_I2C_CLOCK_LEGACY)
		return -EINVAL;

		/* Determine divider value */
		@@ -215,12 +218,18 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
		return div ? (int)div->fdr : -EINVAL;
		}

		static void mpc_i2c_setclock_52xx(struct device_node *node,
		static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		int ret, fdr;

		if (clock == MPC_I2C_CLOCK_PRESERVE) {
		dev_dbg(i2c->dev, "using fdr %d\n",
		readb(i2c->base + MPC_I2C_FDR));
		return;
		}

		ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
		fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */

		@@ -229,16 +238,52 @@ static void mpc_i2c_setclock_52xx(struct device_node *node,
		if (ret >= 0)
		dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
		}
		#else /* !CONFIG_PPC_MPC52xx */
		static void mpc_i2c_setclock_52xx(struct device_node *node,
		#else /* !(CONFIG_PPC_MPC52xx \|\| CONFIG_PPC_MPC512x) */
		static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		}
		#endif /* CONFIG_PPC_MPC52xx \|\| CONFIG_PPC_MPC512x */

		#ifdef CONFIG_PPC_MPC512x
		static void __devinit mpc_i2c_setup_512x(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		struct device_node *node_ctrl;
		void __iomem *ctrl;
		const u32 *pval;
		u32 idx;

		/* Enable I2C interrupts for mpc5121 */
		node_ctrl = of_find_compatible_node(NULL, NULL,
		"fsl,mpc5121-i2c-ctrl");
		if (node_ctrl) {
		ctrl = of_iomap(node_ctrl, 0);
		if (ctrl) {
		/* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
		pval = of_get_property(node, "reg", NULL);
		idx = (*pval & 0xff) / 0x20;
		setbits32(ctrl, 1 << (24 + idx * 2));
		iounmap(ctrl);
		}
		of_node_put(node_ctrl);
		}

		/* The clock setup for the 52xx works also fine for the 512x */
		mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
		}
		#else /* CONFIG_PPC_MPC512x */
		static void __devinit mpc_i2c_setup_512x(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		}
		#endif /* CONFIG_PPC_MPC52xx*/
		#endif /* CONFIG_PPC_MPC512x */

		#ifdef CONFIG_FSL_SOC
		static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
		static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
		{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
		{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
		{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
		@@ -258,7 +303,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
		{49152, 0x011e}, {61440, 0x011f}
		};

		u32 mpc_i2c_get_sec_cfg_8xxx(void)
		static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
		{
		struct device_node *node = NULL;
		u32 __iomem *reg;
		@@ -287,13 +332,14 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
		return val;
		}

		int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
		static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
		u32 prescaler)
		{
		const struct mpc_i2c_divider *div = NULL;
		u32 divider;
		int i;

		if (!clock)
		if (clock == MPC_I2C_CLOCK_LEGACY)
		return -EINVAL;

		/* Determine proper divider value */
		@@ -320,12 +366,19 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
		return div ? (int)div->fdr : -EINVAL;
		}

		static void mpc_i2c_setclock_8xxx(struct device_node *node,
		static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		int ret, fdr;

		if (clock == MPC_I2C_CLOCK_PRESERVE) {
		dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
		readb(i2c->base + MPC_I2C_DFSRR),
		readb(i2c->base + MPC_I2C_FDR));
		return;
		}

		ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
		fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */

		@@ -338,7 +391,7 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
		}

		#else /* !CONFIG_FSL_SOC */
		static void mpc_i2c_setclock_8xxx(struct device_node *node,
		static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
		struct mpc_i2c *i2c,
		u32 clock, u32 prescaler)
		{
		@@ -494,7 +547,7 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
		{
		struct mpc_i2c *i2c;
		const u32 *prop;
		u32 clock = 0;
		u32 clock = MPC_I2C_CLOCK_LEGACY;
		int result = 0;
		int plen;

		@@ -523,21 +576,21 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
		}
		}

		if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
		if (of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
		clock = MPC_I2C_CLOCK_PRESERVE;
		} else {
		prop = of_get_property(op->node, "clock-frequency", &plen);
		if (prop && plen == sizeof(u32))
		clock = *prop;
		}

		if (match->data) {
		struct mpc_i2c_match_data *data =
		(struct mpc_i2c_match_data *)match->data;
		data->setclock(op->node, i2c, clock, data->prescaler);
		struct mpc_i2c_data *data = match->data;
		data->setup(op->node, i2c, clock, data->prescaler);
		} else {
		/* Backwards compatibility */
		if (of_get_property(op->node, "dfsrr", NULL))
		mpc_i2c_setclock_8xxx(op->node, i2c,
		clock, 0);
		}
		mpc_i2c_setup_8xxx(op->node, i2c, clock, 0);
		}

		dev_set_drvdata(&op->dev, i2c);
		@@ -582,47 +635,42 @@ static int __devexit fsl_i2c_remove(struct of_device *op)
		return 0;
		};

		static const struct of_device_id mpc_i2c_of_match[] = {
		{.compatible = "mpc5200-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_52xx,
		},
		},
		{.compatible = "fsl,mpc5200b-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_52xx,
		},
		},
		{.compatible = "fsl,mpc5200-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_52xx,
		},
		},
		{.compatible = "fsl,mpc8313-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_8xxx,
		},
		},
		{.compatible = "fsl,mpc8543-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_8xxx,
		static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {
		.setup = mpc_i2c_setup_512x,
		};

		static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
		.setup = mpc_i2c_setup_52xx,
		};

		static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
		.setup = mpc_i2c_setup_8xxx,
		};

		static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
		.setup = mpc_i2c_setup_8xxx,
		.prescaler = 2,
		},
		},
		{.compatible = "fsl,mpc8544-i2c",
		.data = &(struct mpc_i2c_match_data) {
		.setclock = mpc_i2c_setclock_8xxx,
		};

		static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
		.setup = mpc_i2c_setup_8xxx,
		.prescaler = 3,
		},
		};

		static const struct of_device_id mpc_i2c_of_match[] = {
		{.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
		{.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
		{.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
		{.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
		{.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
		{.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
		{.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
		/* Backward compatibility */
		},
		{.compatible = "fsl-i2c", },
		{},
		};

		MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);


		/* Structure for a device driver */
		static struct of_platform_driver mpc_i2c_driver = {
		.match_table = mpc_i2c_of_match,
		@@ -655,5 +703,5 @@ module_exit(fsl_i2c_exit);

		MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
		MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
		"MPC824x/85xx/52xx processors");
		"MPC824x/83xx/85xx/86xx/512x/52xx processors");
		MODULE_LICENSE("GPL");