Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aa6477d0 authored by Ravit Katzav's avatar Ravit Katzav
Browse files

msm: ipa: add support for IPA clock gating 



IPA driver adds a request for the gcc_ipa_clk only. Other clocks are
managed internally by clock driver and bus driver.
IPA driver requests nominal clock rate (150 MHz) for the gcc_ipa_clk.

Change-Id: I397174f706468e159815557ad9f706b61bb871b0
Signed-off-by: default avatarRavit Katzav <rkatzav@codeaurora.org>
parent bfc96c5e

drivers/platform/msm/ipa/ipa.c

+79 −43
Original line number Diff line number Diff line
@@ -1403,6 +1403,14 @@ static int ipa_get_clks(struct device *dev) 
	if (ipa_ctx->ipa_hw_mode != IPA_HW_MODE_NORMAL)

		return 0;



	ipa_clk = clk_get(dev, "core_clk");

	if (IS_ERR(ipa_clk)) {

		ipa_clk = NULL;

		IPAERR("fail to get ipa clk\n");

		return -ENODEV;

	}



	if (ipa_ctx->ipa_hw_type != IPA_HW_v2_0) {

		ipa_cnoc_clk = clk_get(dev, "iface_clk");

		if (IS_ERR(ipa_cnoc_clk)) {

			ipa_cnoc_clk = NULL;
@@ -1417,13 +1425,6 @@ static int ipa_get_clks(struct device *dev) 
			return -ENODEV;

		}



	ipa_clk = clk_get(dev, "core_clk");

	if (IS_ERR(ipa_clk)) {

		ipa_clk = NULL;

		IPAERR("fail to get ipa clk\n");

		return -ENODEV;

	}



		sys_noc_ipa_axi_clk = clk_get(dev, "bus_clk");

		if (IS_ERR(sys_noc_ipa_axi_clk)) {

			sys_noc_ipa_axi_clk = NULL;
@@ -1437,22 +1438,25 @@ static int ipa_get_clks(struct device *dev) 
			IPAERR("fail to get inactivity clk\n");

			return -ENODEV;

		}

	}



	return 0;

}



/**

* ipa_enable_clks() - Turn on IPA clocks

*

* Return codes:

* None

*/

void ipa_enable_clks(void)

void _ipa_enable_clks_v2_0(void)

{

	IPADBG("enabling IPA clocks and bus voting\n");

	IPADBG("enabling gcc_ipa_clk\n");

	if (ipa_clk) {

		clk_prepare(ipa_clk);

		clk_enable(ipa_clk);

		clk_set_rate(ipa_clk, ipa_ctx->ctrl->ipa_clk_rate);

	} else {

		WARN_ON(1);

	}

}



	if (ipa_ctx->ipa_hw_mode != IPA_HW_MODE_NORMAL)

		return;

void _ipa_enable_clks_v1(void)

{



	if (ipa_cnoc_clk) {

		clk_prepare(ipa_cnoc_clk);
@@ -1464,7 +1468,7 @@ void ipa_enable_clks(void) 


	if (ipa_clk_src)

		clk_set_rate(ipa_clk_src,

				ipa_ctx->ctrl->ipa_src_clk_rate);

				ipa_ctx->ctrl->ipa_clk_rate);

	else

		WARN_ON(1);
@@ -1498,23 +1502,30 @@ void ipa_enable_clks(void) 
	else

		WARN_ON(1);



	if (msm_bus_scale_client_update_request(ipa_ctx->ipa_bus_hdl, 1))

		WARN_ON(1);

}



/**

* ipa_disable_clks() - Turn off IPA clocks

* ipa_enable_clks() - Turn on IPA clocks

*

* Return codes:

* None

*/

void ipa_disable_clks(void)

void ipa_enable_clks(void)

{

	IPADBG("disabling IPA clocks and bus voting\n");

	IPADBG("enabling IPA clocks and bus voting\n");



	if (ipa_ctx->ipa_hw_mode != IPA_HW_MODE_NORMAL)

		return;



	ipa_ctx->ctrl->ipa_enable_clks();



	if (msm_bus_scale_client_update_request(ipa_ctx->ipa_bus_hdl, 1))

		WARN_ON(1);

}



void _ipa_disable_clks_v1(void)

{



	if (ipa_inactivity_clk)

		clk_disable_unprepare(ipa_inactivity_clk);

	else
@@ -1535,10 +1546,35 @@ void ipa_disable_clks(void) 
	else

		WARN_ON(1);



	if (msm_bus_scale_client_update_request(ipa_ctx->ipa_bus_hdl, 0))

}



void _ipa_disable_clks_v2_0(void)

{

	IPADBG("disabling gcc_ipa_clk\n");

	if (ipa_clk)

		clk_disable_unprepare(ipa_clk);

	else

		WARN_ON(1);

}



/**

* ipa_disable_clks() - Turn off IPA clocks

*

* Return codes:

* None

*/

void ipa_disable_clks(void)

{

	IPADBG("disabling IPA clocks and bus voting\n");



	if (ipa_ctx->ipa_hw_mode != IPA_HW_MODE_NORMAL)

			return;



	ipa_ctx->ctrl->ipa_disable_clks();



	if (msm_bus_scale_client_update_request(ipa_ctx->ipa_bus_hdl, 0))

		WARN_ON(1);

}

/**

* ipa_inc_client_enable_clks() - Increase active clients counter, and

* enable ipa clocks if necessary

drivers/platform/msm/ipa/ipa_i.h

+8 −1
Original line number Diff line number Diff line
@@ -773,7 +773,7 @@ struct ipa_plat_drv_res { 
};



struct ipa_controller {

	u32 ipa_src_clk_rate;

	u32 ipa_clk_rate;

	void (*ipa_sram_read_settings)(void);

	void (*ipa_cfg_ep_hdr)(u32 pipe_number,

			const struct ipa_ep_cfg_hdr *ipa_ep_hdr_cfg);
@@ -804,6 +804,9 @@ struct ipa_controller { 
			const struct ipa_ep_cfg_cfg *cfg);

	void (*ipa_cfg_ep_metadata_mask)(u32 clnt_hdl,

			const struct ipa_ep_cfg_metadata_mask *metadata_mask);

	void (*ipa_enable_clks)(void);

	void (*ipa_disable_clks)(void);



};



extern struct ipa_context *ipa_ctx;
@@ -871,6 +874,10 @@ void _ipa_write_dbg_cnt_v1(int option); 
void _ipa_write_dbg_cnt_v2_0(int option);

int _ipa_read_dbg_cnt_v1(char *buf, int max_len);

int _ipa_read_dbg_cnt_v2_0(char *buf, int max_len);

void _ipa_enable_clks_v1(void);

void _ipa_enable_clks_v2_0(void);

void _ipa_disable_clks_v1(void);

void _ipa_disable_clks_v2_0(void);



static inline u32 ipa_read_reg(void *base, u32 offset)

{

drivers/platform/msm/ipa/ipa_utils.c

+9 −3
Original line number Diff line number Diff line
@@ -2783,7 +2783,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_cfg_ep_status = _ipa_cfg_ep_status_v1_1;

		ctrl->ipa_cfg_ep_cfg = _ipa_cfg_ep_cfg_v1_1;

		ctrl->ipa_cfg_ep_metadata_mask = _ipa_cfg_ep_metadata_mask_v1_1;

		ctrl->ipa_src_clk_rate = IPA_V1_CLK_RATE;

		ctrl->ipa_clk_rate = IPA_V1_CLK_RATE;

		ctrl->ipa_read_gen_reg = _ipa_read_gen_reg_v1_0;

		ctrl->ipa_read_ep_reg = _ipa_read_ep_reg_v1_0;

		ctrl->ipa_write_dbg_cnt = _ipa_write_dbg_cnt_v1;
@@ -2791,6 +2791,8 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_commit_flt = __ipa_commit_flt_v1;

		ctrl->ipa_commit_rt = __ipa_commit_rt_v1;

		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v1;

		ctrl->ipa_enable_clks = _ipa_enable_clks_v1;

		ctrl->ipa_disable_clks = _ipa_disable_clks_v1;

		break;

	case (IPA_HW_v1_1):

		ctrl->ipa_sram_read_settings = _ipa_sram_settings_read_v1_1;
@@ -2806,7 +2808,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_cfg_ep_status = _ipa_cfg_ep_status_v1_1;

		ctrl->ipa_cfg_ep_cfg = _ipa_cfg_ep_cfg_v1_1;

		ctrl->ipa_cfg_ep_metadata_mask = _ipa_cfg_ep_metadata_mask_v1_1;

		ctrl->ipa_src_clk_rate = IPA_V1_1_CLK_RATE;

		ctrl->ipa_clk_rate = IPA_V1_1_CLK_RATE;

		ctrl->ipa_read_gen_reg = _ipa_read_gen_reg_v1_1;

		ctrl->ipa_read_ep_reg = _ipa_read_ep_reg_v1_1;

		ctrl->ipa_write_dbg_cnt = _ipa_write_dbg_cnt_v1;
@@ -2814,6 +2816,8 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_commit_flt = __ipa_commit_flt_v1;

		ctrl->ipa_commit_rt = __ipa_commit_rt_v1;

		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v1;

		ctrl->ipa_enable_clks = _ipa_enable_clks_v1;

		ctrl->ipa_disable_clks = _ipa_disable_clks_v1;

		break;

	case (IPA_HW_v2_0):

		ctrl->ipa_sram_read_settings = _ipa_sram_settings_read_v2_0;
@@ -2829,7 +2833,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_cfg_ep_status = _ipa_cfg_ep_status_v2_0;

		ctrl->ipa_cfg_ep_cfg = _ipa_cfg_ep_cfg_v2_0;

		ctrl->ipa_cfg_ep_metadata_mask = _ipa_cfg_ep_metadata_mask_v2_0;

		ctrl->ipa_src_clk_rate = IPA_V2_0_CLK_RATE;

		ctrl->ipa_clk_rate = IPA_V2_0_CLK_RATE;

		ctrl->ipa_read_gen_reg = _ipa_read_gen_reg_v2_0;

		ctrl->ipa_read_ep_reg = _ipa_read_ep_reg_v2_0;

		ctrl->ipa_write_dbg_cnt = _ipa_write_dbg_cnt_v2_0;
@@ -2837,6 +2841,8 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl, 
		ctrl->ipa_commit_flt = __ipa_commit_flt_v2;

		ctrl->ipa_commit_rt = __ipa_commit_rt_v2;

		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v2;

		ctrl->ipa_enable_clks = _ipa_enable_clks_v2_0;

		ctrl->ipa_disable_clks = _ipa_disable_clks_v2_0;

		break;

	default:

		return -EPERM;