Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aa026ede authored by Andi Kleen's avatar Andi Kleen Committed by Andi Kleen
Browse files

[PATCH] x86-64: Fix C3 timer test



There was a typo in the C3 latency test to decide of the TSC
should be used or not. It used the C2 latency threshold, not the
C3 one. Fix that.

This should fix the time on various dual core laptops.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent cb7fabcf
Loading
Loading
Loading
Loading
+1 −1
Original line number Original line Diff line number Diff line
@@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void)
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
#ifdef CONFIG_ACPI
#ifdef CONFIG_ACPI
		/* But TSC doesn't tick in C3 so don't use it there */
		/* But TSC doesn't tick in C3 so don't use it there */
		if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
		if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
			return 1;
			return 1;
#endif
#endif
 		return 0;
 		return 0;