Merge "clk: mdss: use DSI PLL power down sequence for gdsc toggling case" (a7c5abc7) · Commits · e / devices / android_kernel_sony_msm8994

drivers/clk/qcom/mdss/mdss-dsi-20nm-pll-util.c

+3 −16

Original line number	Diff line number	Diff line
		/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -488,19 +488,7 @@ static bool pll_20nm_is_pll_locked(struct mdss_pll_resources *dsi_pll_res)
		return pll_locked;
		}

		void __dsi_pll_disable(void __iomem *pll_base)
		{
		if (!pll_base) {
		pr_err("Invalid pll base.\n");
		return;
		}
		pr_debug("Disabling PHY PLL for PLL_BASE=%p\n", pll_base);

		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_PLL_VCOTAIL_EN, 0x02);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x06);
		}

		static void pll_20nm_config_powerdown(void __iomem *pll_base)
		void pll_20nm_config_powerdown(void __iomem *pll_base)
		{
		if (!pll_base) {
		pr_err("Invalid pll base.\n");
		@@ -511,6 +499,7 @@ static void pll_20nm_config_powerdown(void __iomem *pll_base)
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_CMN_MODE, 0x01);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_PLL_VCOTAIL_EN, 0x82);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_BIAS_EN_CLKBUFLR_EN, 0x02);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x06);
		}

		static int dsi_pll_enable(struct clk *c)
		@@ -559,8 +548,6 @@ static void dsi_pll_disable(struct clk *c)

		dsi_pll_res->handoff_resources = false;

		__dsi_pll_disable(dsi_pll_res->pll_base);

		/* Disable PLL1 to avoid current leakage while toggling MDSS GDSC */
		if (dsi_pll_res->pll_1_base)
		pll_20nm_config_powerdown(dsi_pll_res->pll_1_base);

drivers/clk/qcom/mdss/mdss-dsi-pll-20nm.c

+4 −4

Original line number	Diff line number	Diff line
		/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -62,7 +62,7 @@ static int pll1_vco_set_rate_20nm(struct clk *c, unsigned long rate)
		struct mdss_pll_resources *pll_res = vco->priv;

		mdss_pll_resource_enable(pll_res, true);
		__dsi_pll_disable(pll_res->pll_base);
		pll_20nm_config_powerdown(pll_res->pll_base);
		mdss_pll_resource_enable(pll_res, false);

		pr_debug("Configuring PLL1 registers.\n");
		@@ -465,9 +465,9 @@ static void dsi_pll_off_work(struct work_struct *work)
		mdss_pll_resources, pll_off);

		mdss_pll_resource_enable(pll_res, true);
		__dsi_pll_disable(pll_res->pll_base);
		pll_20nm_config_powerdown(pll_res->pll_base);
		if (pll_res->pll_1_base)
		__dsi_pll_disable(pll_res->pll_1_base);
		pll_20nm_config_powerdown(pll_res->pll_1_base);
		mdss_pll_resource_enable(pll_res, false);
		}

drivers/clk/qcom/mdss/mdss-dsi-pll.h

+2 −2

Original line number	Diff line number	Diff line
		/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -97,7 +97,7 @@ int hr_oclk3_get_div(struct div_clk *clk);
		int ndiv_set_div(struct div_clk *clk, int div);
		int shadow_ndiv_set_div(struct div_clk *clk, int div);
		int ndiv_get_div(struct div_clk *clk);
		void __dsi_pll_disable(void __iomem *pll_base);
		void pll_20nm_config_powerdown(void __iomem *pll_base);

		int set_mdss_pixel_mux_sel(struct mux_clk *clk, int sel);
		int get_mdss_pixel_mux_sel(struct mux_clk *clk);