Loading arch/arm/boot/dts/qcom/msm8909-bus.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_bimc_msmbus_clk>, <&clock_rpm clk_bimc_msmbus_a_clk>; coresight-id = <55>; coresight-name = "coresight-bimc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <3>; }; fab_pcnoc: fab-pcnoc { Loading @@ -44,6 +51,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_pcnoc_msmbus_clk>, <&clock_rpm clk_pcnoc_msmbus_a_clk>; coresight-id = <54>; coresight-name = "coresight-pcnoc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <6>; }; fab_snoc: fab-snoc { Loading @@ -55,6 +69,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_snoc_msmbus_clk>, <&clock_rpm clk_snoc_msmbus_a_clk>; coresight-id = <50>; coresight-name = "coresight-snoc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <5>; }; /* Masters */ Loading Loading
arch/arm/boot/dts/qcom/msm8909-bus.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_bimc_msmbus_clk>, <&clock_rpm clk_bimc_msmbus_a_clk>; coresight-id = <55>; coresight-name = "coresight-bimc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <3>; }; fab_pcnoc: fab-pcnoc { Loading @@ -44,6 +51,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_pcnoc_msmbus_clk>, <&clock_rpm clk_pcnoc_msmbus_a_clk>; coresight-id = <54>; coresight-name = "coresight-pcnoc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <6>; }; fab_snoc: fab-snoc { Loading @@ -55,6 +69,13 @@ clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_rpm clk_snoc_msmbus_clk>, <&clock_rpm clk_snoc_msmbus_a_clk>; coresight-id = <50>; coresight-name = "coresight-snoc"; coresight-nr-inports = <0>; coresight-outports = <0>; coresight-child-list = <&funnel_in2>; coresight-child-ports = <5>; }; /* Masters */ Loading