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Commit a54c0c27 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: remove intel_gtt structure



With the probe call in our dispatch table, we can now cut away the
last three remaining members in the intel_gtt shared struct and so
remove it completely.

v2: Rebased on top of Daniel's series

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
[danvet: bikeshed commit message a bit.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent baa09f5f
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+21 −15
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ struct intel_gtt_driver {
};

static struct _intel_private {
	struct intel_gtt base;
	const struct intel_gtt_driver *driver;
	struct pci_dev *pcidev;	/* device one */
	struct pci_dev *bridge_dev;
@@ -80,6 +79,13 @@ static struct _intel_private {
	/* Whether i915 needs to use the dmar apis or not. */
	unsigned int needs_dmar : 1;
	phys_addr_t gma_bus_addr;
	/*  Size of memory reserved for graphics by the BIOS */
	unsigned int stolen_size;
	/* Total number of gtt entries. */
	unsigned int gtt_total_entries;
	/* Part of the gtt that is mappable by the cpu, for those chips where
	 * this is not the full gtt. */
	unsigned int gtt_mappable_entries;
} intel_private;

#define INTEL_GTT_GEN	intel_private.driver->gen
@@ -510,7 +516,7 @@ static unsigned int intel_gtt_total_entries(void)
		/* On previous hardware, the GTT size was just what was
		 * required to map the aperture.
		 */
		return intel_private.base.gtt_mappable_entries;
		return intel_private.gtt_mappable_entries;
	}
}

@@ -576,8 +582,8 @@ static int intel_gtt_init(void)
	if (ret != 0)
		return ret;

	intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();
	intel_private.base.gtt_total_entries = intel_gtt_total_entries();
	intel_private.gtt_mappable_entries = intel_gtt_mappable_entries();
	intel_private.gtt_total_entries = intel_gtt_total_entries();

	/* save the PGETBL reg for resume */
	intel_private.PGETBL_save =
@@ -589,10 +595,10 @@ static int intel_gtt_init(void)

	dev_info(&intel_private.bridge_dev->dev,
			"detected gtt size: %dK total, %dK mappable\n",
			intel_private.base.gtt_total_entries * 4,
			intel_private.base.gtt_mappable_entries * 4);
			intel_private.gtt_total_entries * 4,
			intel_private.gtt_mappable_entries * 4);

	gtt_map_size = intel_private.base.gtt_total_entries * 4;
	gtt_map_size = intel_private.gtt_total_entries * 4;

	intel_private.gtt = NULL;
	if (INTEL_GTT_GEN < 6 && INTEL_GTT_GEN > 2)
@@ -609,7 +615,7 @@ static int intel_gtt_init(void)

	global_cache_flush();   /* FIXME: ? */

	intel_private.base.stolen_size = intel_gtt_stolen_size();
	intel_private.stolen_size = intel_gtt_stolen_size();

	intel_private.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;

@@ -637,8 +643,7 @@ static int intel_fake_agp_fetch_size(void)
	unsigned int aper_size;
	int i;

	aper_size = (intel_private.base.gtt_mappable_entries << PAGE_SHIFT)
		    / MB(1);
	aper_size = (intel_private.gtt_mappable_entries << PAGE_SHIFT) / MB(1);

	for (i = 0; i < num_sizes; i++) {
		if (aper_size == intel_fake_agp_sizes[i].size) {
@@ -845,8 +850,8 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
	int ret = -EINVAL;

	if (intel_private.clear_fake_agp) {
		int start = intel_private.base.stolen_size / PAGE_SIZE;
		int end = intel_private.base.gtt_mappable_entries;
		int start = intel_private.stolen_size / PAGE_SIZE;
		int end = intel_private.gtt_mappable_entries;
		intel_gtt_clear_range(start, end - start);
		intel_private.clear_fake_agp = false;
	}
@@ -857,7 +862,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
	if (mem->page_count == 0)
		goto out;

	if (pg_start + mem->page_count > intel_private.base.gtt_total_entries)
	if (pg_start + mem->page_count > intel_private.gtt_total_entries)
		goto out_err;

	if (type != mem->type)
@@ -1366,9 +1371,10 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
}
EXPORT_SYMBOL(intel_gmch_probe);

struct intel_gtt *intel_gtt_get(void)
void intel_gtt_get(size_t *gtt_total, size_t *stolen_size)
{
	return &intel_private.base;
	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
	*stolen_size = intel_private.stolen_size;
}
EXPORT_SYMBOL(intel_gtt_get);

+1 −2
Original line number Diff line number Diff line
@@ -406,6 +406,7 @@ struct i915_gtt {
				   unsigned int pg_start,
				   enum i915_cache_level cache_level);
};
#define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)

#define I915_PPGTT_PD_ENTRIES 512
#define I915_PPGTT_PT_ENTRIES 1024
@@ -696,8 +697,6 @@ struct intel_l3_parity {
};

struct i915_gem_mm {
	/** Bridge to intel-gtt-ko */
	struct intel_gtt *gtt;
	/** Memory allocator for GTT stolen memory */
	struct drm_mm stolen;
	/** Memory allocator for GTT */
+6 −24
Original line number Diff line number Diff line
@@ -182,7 +182,8 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
	 * entries. For aliasing ppgtt support we just steal them at the end for
	 * now. */
	first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
	first_pd_entry_in_global_pt =
		gtt_total_entries(dev_priv->gtt) - I915_PPGTT_PD_ENTRIES;

	ppgtt->num_pd_entries = I915_PPGTT_PD_ENTRIES;
	ppgtt->clear_range = gen6_ppgtt_clear_range;
@@ -473,7 +474,7 @@ static void gen6_ggtt_clear_range(struct drm_device *dev,
	struct drm_i915_private *dev_priv = dev->dev_private;
	gtt_pte_t scratch_pte;
	gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
	const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
	int i;

	if (WARN(num_entries > max_entries,
@@ -634,7 +635,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
	unsigned long gtt_size, mappable_size;
	int ret;

	gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
	gtt_size = dev_priv->gtt.total;
	mappable_size = dev_priv->gtt.mappable_end;

	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
@@ -778,7 +779,6 @@ void gen6_gmch_remove(struct drm_device *dev)
	struct drm_i915_private *dev_priv = dev->dev_private;
	iounmap(dev_priv->gtt.gsm);
	teardown_scratch_page(dev_priv->dev);
	kfree(dev_priv->mm.gtt);
}

static int i915_gmch_probe(struct drm_device *dev,
@@ -788,22 +788,13 @@ static int i915_gmch_probe(struct drm_device *dev,
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;

	/* This is a temporary hack to make the code cleaner in
	 * i915_gem_gtt_init. I promise it will go away very shortly. */
	kfree(dev_priv->mm.gtt);

	ret = intel_gmch_probe(dev_priv->bridge_dev, dev_priv->dev->pdev, NULL);
	if (!ret) {
		DRM_ERROR("failed to set up gmch\n");
		return -EIO;
	}

	dev_priv->mm.gtt = intel_gtt_get();
	if (!dev_priv->mm.gtt) {
		DRM_ERROR("Failed to initialize GTT\n");
		intel_gmch_remove();
		return -ENODEV;
	}
	intel_gtt_get(gtt_total, stolen);

	dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev);
	dev_priv->gtt.gtt_clear_range = i915_ggtt_clear_range;
@@ -824,10 +815,6 @@ int i915_gem_gtt_init(struct drm_device *dev)
	unsigned long gtt_size;
	int ret;

	dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL);
	if (!dev_priv->mm.gtt)
		return -ENOMEM;

	gtt->mappable_base = pci_resource_start(dev->pdev, 2);
	gtt->mappable_end = pci_resource_len(dev->pdev, 2);

@@ -841,13 +828,8 @@ int i915_gem_gtt_init(struct drm_device *dev)

	ret = dev_priv->gtt.gtt_probe(dev, &dev_priv->gtt.total,
				     &dev_priv->gtt.stolen_size);
	if (ret) {
		kfree(dev_priv->mm.gtt);
	if (ret)
		return ret;
	}

	dev_priv->mm.gtt->gtt_total_entries = dev_priv->gtt.total >> PAGE_SHIFT;
	dev_priv->mm.gtt->stolen_size = dev_priv->gtt.stolen_size;

	gtt_size = (dev_priv->gtt.total >> PAGE_SHIFT) * sizeof(gtt_pte_t);

+4 −4
Original line number Diff line number Diff line
@@ -187,11 +187,11 @@ int i915_gem_init_stolen(struct drm_device *dev)
	if (dev_priv->mm.stolen_base == 0)
		return 0;

	DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
		      dev_priv->mm.gtt->stolen_size, dev_priv->mm.stolen_base);
	DRM_DEBUG_KMS("found %zd bytes of stolen memory at %08lx\n",
		      dev_priv->gtt.stolen_size, dev_priv->mm.stolen_base);

	/* Basic memrange allocator for stolen space */
	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->mm.gtt->stolen_size);
	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size);

	return 0;
}
@@ -205,7 +205,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
	struct scatterlist *sg;

	DRM_DEBUG_DRIVER("offset=0x%x, size=%d\n", offset, size);
	BUG_ON(offset > dev_priv->mm.gtt->stolen_size - size);
	BUG_ON(offset > dev_priv->gtt.stolen_size - size);

	/* We hide that we have no struct page backing our stolen object
	 * by wrapping the contiguous physical allocation with a fake
+1 −9
Original line number Diff line number Diff line
@@ -3,15 +3,7 @@
#ifndef _DRM_INTEL_GTT_H
#define	_DRM_INTEL_GTT_H

struct intel_gtt {
	/* Size of memory reserved for graphics by the BIOS */
	unsigned int stolen_size;
	/* Total number of gtt entries. */
	unsigned int gtt_total_entries;
	/* Part of the gtt that is mappable by the cpu, for those chips where
	 * this is not the full gtt. */
	unsigned int gtt_mappable_entries;
} *intel_gtt_get(void);
void intel_gtt_get(size_t *gtt_total, size_t *stolen_size);

int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
		     struct agp_bridge_data *bridge);