Merge "regulator: spm-regulator: add support for FTS 2.5 type regulators" (a4317ca4) · Commits · e / devices / android_kernel_sony_msm8994

drivers/regulator/spm-regulator.c

+42 −37

Original line number	Diff line number	Diff line
		@@ -37,20 +37,30 @@ struct voltage_range {
		int step_uV;
		};

		enum qpnp_regulator_uniq_type {
		QPNP_TYPE_FTS2,
		QPNP_TYPE_FTS2p5,
		QPNP_TYPE_ULT_HF,
		};

		enum qpnp_regulator_type {
		QPNP_FTS2_TYPE = 0x1C,
		QPNP_FTS2p5_TYPE = 0x1C,
		QPNP_ULT_HF_TYPE = 0x22,
		};

		enum qpnp_regulator_subtype {
		QPNP_FTS2_SUBTYPE = 0x08,
		QPNP_FTS2p5_SUBTYPE = 0x09,
		QPNP_ULT_HF_SUBTYPE = 0x0D,
		};

		/* Properties for FTS2 type QPNP PMIC regulators. */

		static const struct voltage_range fts2_range0 = {0, 350000, 1275000, 5000};
		static const struct voltage_range fts2_range1 = {0, 700000, 2040000, 10000};
		static const struct voltage_range fts2p5_range0
		= { 80000, 350000, 1355000, 5000};
		static const struct voltage_range fts2p5_range1
		= {160000, 700000, 2200000, 10000};
		static const struct voltage_range ult_hf_range0 = {375000, 375000, 1562500,
		12500};
		static const struct voltage_range ult_hf_range1 = {750000, 750000, 1525000,
		@@ -107,7 +117,7 @@ struct spm_vreg {
		u16 spmi_base_addr;
		u8 init_mode;
		int step_rate;
		enum qpnp_regulator_type regulator_type;
		enum qpnp_regulator_uniq_type regulator_type;
		u32 cpu_num;
		};

		@@ -132,7 +142,7 @@ static int _spm_regulator_set_voltage(struct regulator_dev *rdev)
		if (vreg->vlevel == vreg->last_set_vlevel)
		return 0;

		if ((vreg->regulator_type == QPNP_FTS2_TYPE)
		if ((vreg->regulator_type == QPNP_TYPE_FTS2)
		&& !(vreg->init_mode & QPNP_SMPS_MODE_PWM)
		&& vreg->uV > vreg->last_set_uV) {
		/* Switch to PWM mode so that voltage ramping is fast. */
		@@ -153,7 +163,7 @@ static int _spm_regulator_set_voltage(struct regulator_dev *rdev)
		vreg->step_rate));
		}

		if ((vreg->regulator_type == QPNP_FTS2_TYPE)
		if ((vreg->regulator_type == QPNP_TYPE_FTS2)
		&& !(vreg->init_mode & QPNP_SMPS_MODE_PWM)
		&& vreg->uV > vreg->last_set_uV) {
		/* Wait for mode transition to complete. */
		@@ -202,7 +212,7 @@ static int spm_regulator_set_voltage(struct regulator_dev *rdev, int min_uV,
		/ vreg->range->step_uV;

		/* Fix VSET for ULT HF Buck */
		if ((vreg->regulator_type == QPNP_ULT_HF_TYPE) &&
		if ((vreg->regulator_type == QPNP_TYPE_ULT_HF) &&
		(range == &ult_hf_range1)) {

		vlevel &= 0x1F;
		@@ -287,33 +297,25 @@ static int qpnp_smps_check_type(struct spm_vreg *vreg)
		return rc;
		}

		switch (type[0]) {
		case QPNP_FTS2_TYPE:
		if (type[1] != QPNP_FTS2_SUBTYPE) {
		dev_err(&vreg->spmi_dev->dev, "%s: invalid subtype=0x%02X register\n",
		__func__, type[1]);
		return -ENODEV;
		}
		vreg->regulator_type = QPNP_FTS2_TYPE;
		break;
		case QPNP_ULT_HF_TYPE:
		if (type[1] != QPNP_ULT_HF_SUBTYPE) {
		dev_err(&vreg->spmi_dev->dev, "%s: invalid subtype=0x%02X register\n",
		__func__, type[1]);
		return -ENODEV;
		}
		vreg->regulator_type = QPNP_ULT_HF_TYPE;
		break;
		default:
		dev_err(&vreg->spmi_dev->dev, "%s: invalid type=0x%02X register\n",
		__func__, type[0]);
		if (type[0] == QPNP_FTS2_TYPE && type[1] == QPNP_FTS2_SUBTYPE) {
		vreg->regulator_type = QPNP_TYPE_FTS2;
		} else if (type[0] == QPNP_FTS2p5_TYPE
		&& type[1] == QPNP_FTS2p5_SUBTYPE) {
		vreg->regulator_type = QPNP_TYPE_FTS2p5;
		} else if (type[0] == QPNP_ULT_HF_TYPE
		&& type[1] == QPNP_ULT_HF_SUBTYPE) {
		vreg->regulator_type = QPNP_TYPE_ULT_HF;
		} else {
		dev_err(&vreg->spmi_dev->dev, "%s: invalid type=0x%02X, subtype=0x%02X register pair\n",
		__func__, type[0], type[1]);
		return -ENODEV;
		};

		return rc;
		}

		static int qpnp_fts2_init_range(struct spm_vreg *vreg)
		static int qpnp_fts_init_range(struct spm_vreg *vreg,
		const struct voltage_range range0, const struct voltage_range range1)
		{
		int rc;
		u8 reg = 0;
		@@ -327,9 +329,9 @@ static int qpnp_fts2_init_range(struct spm_vreg *vreg)
		}

		if (reg == 0x00) {
		vreg->range = &fts2_range0;
		vreg->range = range0;
		} else if (reg == 0x01) {
		vreg->range = &fts2_range1;
		vreg->range = range1;
		} else {
		dev_err(&vreg->spmi_dev->dev, "%s: voltage range=%d is invalid\n",
		__func__, reg);
		@@ -377,7 +379,7 @@ static int qpnp_smps_init_voltage(struct spm_vreg *vreg)
		* In case of range 1: VSET is a 5 bit value
		*
		*/
		if ((vreg->regulator_type == QPNP_ULT_HF_TYPE) &&
		if ((vreg->regulator_type == QPNP_TYPE_ULT_HF) &&
		(vreg->range == &ult_hf_range1))
		vreg->vlevel &= ~ULT_SMPS_RANGE_SPLIT;

		@@ -398,7 +400,8 @@ static int qpnp_smps_init_mode(struct spm_vreg *vreg)
		if (strcmp("pwm", mode_name) == 0) {
		vreg->init_mode = QPNP_SMPS_MODE_PWM;
		} else if ((strcmp("auto", mode_name) == 0) &&
		(vreg->regulator_type == QPNP_FTS2_TYPE)) {
		(vreg->regulator_type == QPNP_TYPE_FTS2
		\|\| vreg->regulator_type == QPNP_TYPE_FTS2p5)) {
		vreg->init_mode = QPNP_FTS2_MODE_AUTO;
		} else {
		dev_err(&vreg->spmi_dev->dev, "%s: unknown regulator mode: %s\n",
		@@ -441,7 +444,7 @@ static int qpnp_smps_init_step_rate(struct spm_vreg *vreg)
		}

		/* ULT buck does not support steps */
		if (vreg->regulator_type != QPNP_ULT_HF_TYPE)
		if (vreg->regulator_type != QPNP_TYPE_ULT_HF)
		step = (reg & QPNP_FTS2_STEP_CTRL_STEP_MASK)
		>> QPNP_FTS2_STEP_CTRL_STEP_SHIFT;

		@@ -452,7 +455,7 @@ static int qpnp_smps_init_step_rate(struct spm_vreg *vreg)
		vreg->step_rate = QPNP_FTS2_CLOCK_RATE * vreg->range->step_uV
		* (1 << step);

		if (vreg->regulator_type == QPNP_ULT_HF_TYPE)
		if (vreg->regulator_type == QPNP_TYPE_ULT_HF)
		vreg->step_rate /= 1000 * (QPNP_ULT_HF_STEP_DELAY << delay);
		else
		vreg->step_rate /= 1000 * (QPNP_FTS2_STEP_DELAY << delay);
		@@ -517,9 +520,11 @@ static int spm_regulator_probe(struct spmi_device *spmi)
		* PMIC power on sequence. Once it is set, it cannot be changed
		* dynamically.
		*/
		if (vreg->regulator_type == QPNP_FTS2_TYPE)
		rc = qpnp_fts2_init_range(vreg);
		else if (vreg->regulator_type == QPNP_ULT_HF_TYPE)
		if (vreg->regulator_type == QPNP_TYPE_FTS2)
		rc = qpnp_fts_init_range(vreg, &fts2_range0, &fts2_range1);
		else if (vreg->regulator_type == QPNP_TYPE_FTS2p5)
		rc = qpnp_fts_init_range(vreg, &fts2p5_range0, &fts2p5_range1);
		else if (vreg->regulator_type == QPNP_TYPE_ULT_HF)
		rc = qpnp_ult_hf_init_range(vreg);
		if (rc)
		return rc;