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Commit a3dc48e8 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
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ath9k: do not link receive buffers during flush



On AR9300 the rx FIFO needs to be empty during reset to ensure that no
further DMA activity is generated, otherwise it might lead to memory
corruption issues.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 0981c3b2
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+6 −4
Original line number Diff line number Diff line
@@ -744,6 +744,7 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
			return NULL;
	}

	list_del(&bf->list);
	if (!bf->bf_mpdu)
		return bf;

@@ -1254,13 +1255,14 @@ requeue_drop_frag:
			sc->rx.frag = NULL;
		}
requeue:
		if (edma) {
		list_add_tail(&bf->list, &sc->rx.rxbuf);
		if (flush)
			continue;

		if (edma) {
			ath_rx_edma_buf_link(sc, qtype);
		} else {
			list_move_tail(&bf->list, &sc->rx.rxbuf);
			ath_rx_buf_link(sc, bf);
			if (!flush)
			ath9k_hw_rxena(ah);
		}
	} while (1);