Loading arch/arm/boot/dts/qcom/msm8610-mdss.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -16,6 +16,7 @@ reg = <0xfd900000 0x100000>; reg-names = "mdp_phys"; interrupts = <0 72 0>; vdd-cx-supply = <&pm8110_s1_corner>; mdss_fb0: qcom,mdss_fb_primary { cell-index = <0>; Loading drivers/video/msm/mdss/mdp3.c +58 −3 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ #include <linux/memblock.h> #include <linux/iopoll.h> #include <linux/clk/msm-clk.h> #include <linux/regulator/rpm-smd-regulator.h> #include <mach/board.h> #include <mach/hardware.h> Loading Loading @@ -1082,6 +1083,54 @@ static int mdp3_parse_dt(struct platform_device *pdev) return 0; } void msm_mdp3_cx_ctrl(int enable) { int rc; if (!mdp3_res->vdd_cx) { mdp3_res->vdd_cx = devm_regulator_get(&mdp3_res->pdev->dev, "vdd-cx"); if (IS_ERR_OR_NULL(mdp3_res->vdd_cx)) { pr_debug("unable to get CX reg. rc=%d\n", PTR_RET(mdp3_res->vdd_cx)); mdp3_res->vdd_cx = NULL; return; } } if (enable) { rc = regulator_set_voltage( mdp3_res->vdd_cx, RPM_REGULATOR_CORNER_SVS_SOC, RPM_REGULATOR_CORNER_SUPER_TURBO); if (rc < 0) goto vreg_set_voltage_fail; rc = regulator_enable(mdp3_res->vdd_cx); if (rc) { pr_err("Failed to enable regulator vdd_cx.\n"); return; } } else { rc = regulator_disable(mdp3_res->vdd_cx); if (rc) { pr_err("Failed to disable regulator vdd_cx.\n"); return; } rc = regulator_set_voltage( mdp3_res->vdd_cx, RPM_REGULATOR_CORNER_NONE, RPM_REGULATOR_CORNER_SUPER_TURBO); if (rc < 0) goto vreg_set_voltage_fail; } return; vreg_set_voltage_fail: pr_err("Set vltg failed\n"); return; } void mdp3_batfet_ctrl(int enable) { int rc; Loading Loading @@ -1114,6 +1163,12 @@ void mdp3_batfet_ctrl(int enable) pr_err("%s: reg enable/disable failed", __func__); } void mdp3_enable_regulator(int enable) { msm_mdp3_cx_ctrl(enable); mdp3_batfet_ctrl(enable); } static void mdp3_iommu_heap_unmap_iommu(struct mdp3_iommu_meta *meta) { unsigned int domain_num; Loading Loading @@ -1847,7 +1902,7 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) else mdp3_res->intf[MDP3_DMA_OUTPUT_SEL_DSI_CMD].active = 1; mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); mdp3_res->cont_splash_en = 1; return 0; Loading Loading @@ -2201,13 +2256,13 @@ int mdp3_panel_get_boot_cfg(void) static int mdp3_suspend_sub(struct mdp3_hw_resource *mdata) { mdp3_batfet_ctrl(false); mdp3_enable_regulator(false); return 0; } static int mdp3_resume_sub(struct mdp3_hw_resource *mdata) { mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); return 0; } Loading drivers/video/msm/mdss/mdp3.h +2 −1 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ struct mdp3_hw_resource { bool batfet_required; struct regulator *batfet; struct regulator *vdd_cx; }; struct mdp3_img_data { Loading Loading @@ -200,7 +201,7 @@ int mdp3_put_mdp_dsi_clk(void); int mdp3_misr_set(struct mdp_misr *misr_req); int mdp3_misr_get(struct mdp_misr *misr_resp); void mdp3_batfet_ctrl(int enable); void mdp3_enable_regulator(int enable); #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) Loading drivers/video/msm/mdss/mdp3_ctrl.c +2 −2 Original line number Diff line number Diff line Loading @@ -583,7 +583,7 @@ static int mdp3_ctrl_on(struct msm_fb_data_type *mfd) goto on_error; } mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); mdp3_ctrl_notifier_register(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); Loading Loading @@ -710,7 +710,7 @@ static int mdp3_ctrl_off(struct msm_fb_data_type *mfd) mdp3_ctrl_notifier_unregister(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); mdp3_batfet_ctrl(false); mdp3_enable_regulator(false); mdp3_session->vsync_enabled = 0; atomic_set(&mdp3_session->vsync_countdown, 0); atomic_set(&mdp3_session->dma_done_cnt, 0); Loading Loading
arch/arm/boot/dts/qcom/msm8610-mdss.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -16,6 +16,7 @@ reg = <0xfd900000 0x100000>; reg-names = "mdp_phys"; interrupts = <0 72 0>; vdd-cx-supply = <&pm8110_s1_corner>; mdss_fb0: qcom,mdss_fb_primary { cell-index = <0>; Loading
drivers/video/msm/mdss/mdp3.c +58 −3 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ #include <linux/memblock.h> #include <linux/iopoll.h> #include <linux/clk/msm-clk.h> #include <linux/regulator/rpm-smd-regulator.h> #include <mach/board.h> #include <mach/hardware.h> Loading Loading @@ -1082,6 +1083,54 @@ static int mdp3_parse_dt(struct platform_device *pdev) return 0; } void msm_mdp3_cx_ctrl(int enable) { int rc; if (!mdp3_res->vdd_cx) { mdp3_res->vdd_cx = devm_regulator_get(&mdp3_res->pdev->dev, "vdd-cx"); if (IS_ERR_OR_NULL(mdp3_res->vdd_cx)) { pr_debug("unable to get CX reg. rc=%d\n", PTR_RET(mdp3_res->vdd_cx)); mdp3_res->vdd_cx = NULL; return; } } if (enable) { rc = regulator_set_voltage( mdp3_res->vdd_cx, RPM_REGULATOR_CORNER_SVS_SOC, RPM_REGULATOR_CORNER_SUPER_TURBO); if (rc < 0) goto vreg_set_voltage_fail; rc = regulator_enable(mdp3_res->vdd_cx); if (rc) { pr_err("Failed to enable regulator vdd_cx.\n"); return; } } else { rc = regulator_disable(mdp3_res->vdd_cx); if (rc) { pr_err("Failed to disable regulator vdd_cx.\n"); return; } rc = regulator_set_voltage( mdp3_res->vdd_cx, RPM_REGULATOR_CORNER_NONE, RPM_REGULATOR_CORNER_SUPER_TURBO); if (rc < 0) goto vreg_set_voltage_fail; } return; vreg_set_voltage_fail: pr_err("Set vltg failed\n"); return; } void mdp3_batfet_ctrl(int enable) { int rc; Loading Loading @@ -1114,6 +1163,12 @@ void mdp3_batfet_ctrl(int enable) pr_err("%s: reg enable/disable failed", __func__); } void mdp3_enable_regulator(int enable) { msm_mdp3_cx_ctrl(enable); mdp3_batfet_ctrl(enable); } static void mdp3_iommu_heap_unmap_iommu(struct mdp3_iommu_meta *meta) { unsigned int domain_num; Loading Loading @@ -1847,7 +1902,7 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) else mdp3_res->intf[MDP3_DMA_OUTPUT_SEL_DSI_CMD].active = 1; mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); mdp3_res->cont_splash_en = 1; return 0; Loading Loading @@ -2201,13 +2256,13 @@ int mdp3_panel_get_boot_cfg(void) static int mdp3_suspend_sub(struct mdp3_hw_resource *mdata) { mdp3_batfet_ctrl(false); mdp3_enable_regulator(false); return 0; } static int mdp3_resume_sub(struct mdp3_hw_resource *mdata) { mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); return 0; } Loading
drivers/video/msm/mdss/mdp3.h +2 −1 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ struct mdp3_hw_resource { bool batfet_required; struct regulator *batfet; struct regulator *vdd_cx; }; struct mdp3_img_data { Loading Loading @@ -200,7 +201,7 @@ int mdp3_put_mdp_dsi_clk(void); int mdp3_misr_set(struct mdp_misr *misr_req); int mdp3_misr_get(struct mdp_misr *misr_resp); void mdp3_batfet_ctrl(int enable); void mdp3_enable_regulator(int enable); #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) Loading
drivers/video/msm/mdss/mdp3_ctrl.c +2 −2 Original line number Diff line number Diff line Loading @@ -583,7 +583,7 @@ static int mdp3_ctrl_on(struct msm_fb_data_type *mfd) goto on_error; } mdp3_batfet_ctrl(true); mdp3_enable_regulator(true); mdp3_ctrl_notifier_register(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); Loading Loading @@ -710,7 +710,7 @@ static int mdp3_ctrl_off(struct msm_fb_data_type *mfd) mdp3_ctrl_notifier_unregister(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); mdp3_batfet_ctrl(false); mdp3_enable_regulator(false); mdp3_session->vsync_enabled = 0; atomic_set(&mdp3_session->vsync_countdown, 0); atomic_set(&mdp3_session->dma_done_cnt, 0); Loading