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Commit a2c8b479 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add A7 subsystem clocks for MSM ZIRC"

parents 1c7f0a1f 57f8f742

arch/arm/boot/dts/qcom/msmzirc-cc.dtsi

+63 −2
Original line number Diff line number Diff line
@@ -21,14 +21,38 @@ 
		#clock-cells = <1>;

	};



	clock_a7pll: qcom,a7pll@0xB008018 {

		compatible = "qcom,msm-clock-controller";

		reg = <0xB008018 0x9020>;

		reg-names = "cc-base";

		#clock-cells = <1>;



		clock-names = "a7_xo_a";

		clocks = <&clock_rpm clk_xo_a_clk_src>;



		qcom,regulator-names = "a7pll_vdd_dig";

		a7pll_vdd_dig-supply = <&pmd9635_s5_corner_ao>;



		a7pll_vdd_dig: a7pll_vdd_dig {

			compatible = "qcom,simple-vdd-class";

			qcom,regulators = <&pmd9635_s5_corner_ao>;

			qcom,uV-levels =

					<RPM_REGULATOR_CORNER_NONE>,

					<RPM_REGULATOR_CORNER_SVS_SOC>,

					<RPM_REGULATOR_CORNER_NOMINAL>,

					<RPM_REGULATOR_CORNER_SUPER_TURBO>;

		};

	};



	clock_gcc: qcom,gcc@1800000 {

		compatible = "qcom,msm-clock-controller";

		reg = <0x1800000 0x80000>;

		reg-names = "cc-base";

		#clock-cells = <1>;

		clock-names = "xo", "xo_a";

		clock-names = "xo", "xo_a", "a7_debug_clk";

		clocks = <&clock_rpm clk_xo_clk_src>,

		         <&clock_rpm clk_xo_a_clk_src>;

		         <&clock_rpm clk_xo_a_clk_src>,

		         <&clock_a7pll clk_a7_debug_mux>;



		qcom,regulator-names = "gcc_vdd_dig";

		gcc_vdd_dig-supply = <&pmd9635_s5_corner>;
@@ -268,6 +292,11 @@ 
		qcom,clock-names = "xo_a";

	};



	gcc_a7_debug_clk: gcc_a7_debug_clk {

		compatible = "qcom,ext-clk";

		qcom,clock-names = "a7_debug_clk";

	};



	gpll0: gpll0 {

		compatible = "qcom,sleep-active-pll";

		qcom,en-offset = <GCC_APCS_GPLL_ENA_VOTE>;
@@ -1174,6 +1203,7 @@ 
			<0x00d0 &gcc_pdm_ahb_clk>,

			<0x00d2 &gcc_pdm2_clk>,

			<0x00f8 &gcc_boot_rom_ahb_clk>,

			<0x016A &gcc_a7_debug_clk>,

			<0x0203 &gcc_usb3_axi_tbu_clk>,

			<0x0204 &gcc_pcie_axi_tbu_clk>,

			<0x0208 &pcie_pipe_clk>,
@@ -1190,9 +1220,40 @@ 
			<0x023b &gcc_pcie_sleep_clk>,

			<0x023c &gcc_pcie_axi_mstr_clk>,

			<>;

		qcom,recursive-parents = <&gcc_a7_debug_clk>;

		qcom,cxo = <&xo>;

		qcom,xo-div4-cbcr = <GCC_GCC_XO_DIV4_CBCR>;

		qcom,test-pad-config = <0x51A00>;

		qcom,clk-flags = <0xC000>;

	};

};



&clock_a7pll {

	a7_xo_a: a7_xo_a {

		compatible = "qcom,ext-clk";

		qcom,clock-names = "a7_xo_a";

	};



	a7_m_clk: a7_m_clk {

		compatible = "qcom,dummy-clk";

	};



	a7pll_clk: a7pll_clk {

		compatible = "qcom,alpha-pll-20p";

		qcom,parent = <&a7_xo_a>;

		qcom,base-offset = <0x0>;

		qcom,supply-group = <&a7pll_vdd_dig>;

		qcom,clk-fmax =

                        <FMAX_LOW 400000000>,

                        <FMAX_NOM 800000000>,

                        <FMAX_TURBO 1200000000>;

	};



	a7_debug_mux: a7_debug_mux {

		compatible = "qcom,mux-reg";

		qcom,offset = <0x9004>;

		qcom,mask = <0x7>;

		qcom,shift = <3>;

		qcom,parents =<0x3 &a7_m_clk>;

	};

};

arch/arm/boot/dts/qcom/msmzirc.dtsi

+19 −5
Original line number Diff line number Diff line
@@ -293,19 +293,33 @@ 
		clocks = <&clock_rpm 0xeeec2919>;

	};



	qcom,clock-a7@0b011050 {

	qcom,clock-a7@0b010008 {

		compatible = "qcom,clock-a7-zirc";

		reg = <0x0b011050 0x8>;

		reg = <0x0B010008 0x8>;

		reg-names = "rcg-base";



		clock-names = "clk-1", "clk-5";

		clocks = <&clock_gcc clk_gpll0_ao>,

			 <&clock_a7pll clk_a7pll_clk>;



		qcom,speed0-bin-v0 =

			<         0 0>,

			< 400000000 4>,

			< 793000000 5>,

			<1160000000 7>;

			< 787200000 5>,

			<1190400000 7>;



		status = "disabled";

		cpu-vdd-supply = <&pmd9635_s5_corner_ao>;

	};



        qcom,msm-cpufreq@0 {

                reg = <0 4>;

                compatible = "qcom,msm-cpufreq";

                qcom,cpufreq-table =

                        <  300000 >,

                        <  600000 >,

                        <  787200 >,

                        <  998400 >,

                        < 1190400 >;

        };



	spi_0: spi@78b5000 { /* BLSP1 QUP1 */

include/dt-bindings/clock/msm-clocks-zirc.h

+4 −0
Original line number Diff line number Diff line
@@ -116,4 +116,8 @@ 
#define clk_gcc_mss_q6_bimc_axi_clk		&gcc_mss_q6_bimc_axi_clk

#define clk_gcc_boot_rom_ahb_clk		&gcc_boot_rom_ahb_clk



/* a7pll */

#define clk_a7pll_clk				&a7pll_clk

#define clk_a7_debug_mux			&a7_debug_mux



#endif