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Commit a2b557c5 authored by Yan He's avatar Yan He
Browse files

msm: pcie: Add IO resource for PCIe 



PCI framework requires IO resource allocation for PCIe endpoint. Thus,
add the support for IO resource in this change.

Change-Id: I2f410880f446fe70ce0017467c040fbcfebc0a6a
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent abc05143

Documentation/devicetree/bindings/pci/msm_pcie.txt

+4 −3
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ Required properties: 
  - #address-cells: Should provide a value of 0.

  - reg: should contain PCIe register maps.

  - reg-names: indicates various resources passed to driver by name.

		Should be "parf", "dm_core", "elbi", "conf", "bars", "phy".

		Should be "parf", "phy", "dm_core", "elbi", "conf", "io", "bars".

		These correspond to different modules within the PCIe core.

  - interrupts: Should be in the format <0 1 2> and it is an index to the

		interrupt-map that contains PCIe related interrupts.
@@ -61,9 +61,10 @@ Example: 
		      <0xff000000 0x1000>,

		      <0xff001000 0x1000>,

		      <0xff100000 0x1000>,

		      <0xff200000 0xe00000>;

		      <0xff200000 0x100000>,

		      <0xff300000 0xd00000>;

		reg-names = "parf", "dm_core", "elbi",

				"conf", "bars";

				"conf", "io", "bars";

		interrupt-parent = <&pcie0>;

		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>;

		#interrupt-cells = <1>;

arch/arm/boot/dts/qti/apq8084.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -389,10 +389,11 @@ 
		      <0xff000000 0x1000>,

		      <0xff001000 0x1000>,

		      <0xff100000 0x1000>,

		      <0xff200000 0xe00000>;

		      <0xff200000 0x100000>,

		      <0xff300000 0xd00000>;



		reg-names = "parf", "phy", "dm_core", "elbi",

				"conf", "bars";

				"conf", "io", "bars";



		#address-cells = <0>;

		interrupt-parent = <&pcie0>;

arch/arm/boot/dts/qti/msmkrypton.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -187,9 +187,10 @@ 
		      <0x80000000 0x1000>,

		      <0x80001000 0x1000>,

		      <0x80100000 0x1000>,

		      <0x80200000 0xe00000>;

		      <0x80200000 0x100000>,

		      <0x80300000 0xd00000>;

		reg-names = "parf", "phy", "dm_core", "elbi",

				"conf", "bars";

				"conf", "io", "bars";



		#address-cells = <0>;

		interrupt-parent = <&pcie0>;

arch/arm/mach-msm/pcie.c

+7 −1
Original line number Diff line number Diff line
@@ -180,6 +180,7 @@ static const struct msm_pcie_res_info_t msm_pcie_res_info[MSM_PCIE_MAX_RES] = { 
	{"dm_core",	0, 0},

	{"elbi",	0, 0},

	{"conf",	0, 0},

	{"io",		0, 0},

	{"bars",	0, 0}

};
@@ -910,6 +911,8 @@ static int msm_pcie_get_resources(u32 rc_idx, struct platform_device *pdev) 
	dev->conf = dev->res[MSM_PCIE_RES_CONF].base;

	dev->bars = dev->res[MSM_PCIE_RES_BARS].base;

	dev->dev_mem_res = dev->res[MSM_PCIE_RES_BARS].resource;

	dev->dev_io_res = dev->res[MSM_PCIE_RES_IO].resource;

	dev->dev_io_res->flags = IORESOURCE_IO;



	return ret;

}
@@ -922,6 +925,7 @@ static void msm_pcie_release_resources(u32 rc_idx) 
	msm_pcie_dev[rc_idx].conf = NULL;

	msm_pcie_dev[rc_idx].bars = NULL;

	msm_pcie_dev[rc_idx].dev_mem_res = NULL;

	msm_pcie_dev[rc_idx].dev_io_res = NULL;

}



static int msm_pcie_enable(u32 rc_idx, u32 options)
@@ -1105,12 +1109,14 @@ static int msm_pcie_setup(int nr, struct pci_sys_data *sys) 
	 */

	if (!init) {

		sys->mem_offset = 0;

		sys->io_offset = 0;

		init = true;

	}



	pci_add_resource(&sys->resources,

			msm_pcie_dev[pcie_drv.current_rc].dev_io_res);

	pci_add_resource(&sys->resources,

			msm_pcie_dev[pcie_drv.current_rc].dev_mem_res);



	return 1;

}

arch/arm/mach-msm/pcie.h

+3 −1
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ enum msm_pcie_res { 
	MSM_PCIE_RES_DM_CORE,

	MSM_PCIE_RES_ELBI,

	MSM_PCIE_RES_CONF,

	MSM_PCIE_RES_IO,

	MSM_PCIE_RES_BARS,

	MSM_PCIE_MAX_RES,

};
@@ -147,6 +148,7 @@ struct msm_pcie_dev_t { 
	uint32_t                      axi_bar_end;



	struct resource               *dev_mem_res;

	struct resource               *dev_io_res;



	uint32_t                      wake_n;

	uint32_t                      vreg_n;