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Commit a223e4ce authored by Ravit Katzav's avatar Ravit Katzav
Browse files

msm: ipa: dynamic internal memory partition 



IPA Internal memory partition between apps and modem depends on
IPA version. Move memory partition information to IPA controller structure
in order to dynamically allocate memory according to IPA HW versions.

Change-Id: I72a96e8821ed521e3d6d03645511524f623a36b5
Acked-by: default avatarYaniv Lefel <ylefel@qti.qualcomm.com>
Signed-off-by: default avatarGidon Studinski <gidons@codeaurora.org>
Signed-off-by: default avatarRavit Katzav <rkatzav@codeaurora.org>
parent 3511ae2a

drivers/platform/msm/ipa/ipa.c

+45 −41
Original line number Diff line number Diff line
@@ -58,8 +58,10 @@ 


#define IPA_Q6_CLEANUP_FLT_RT_MAX_CMDS \

	(IPA_NUM_PIPES*2 + \

	(IPA_v2_V4_MODEM_RT_INDEX_HI - IPA_v2_V4_MODEM_RT_INDEX_LO + 1) + \

	(IPA_v2_V6_MODEM_RT_INDEX_HI - IPA_v2_V6_MODEM_RT_INDEX_LO + 1)) \

	(IPA_MEM_PART(v4_modem_rt_index_hi) - \

		IPA_MEM_PART(v4_modem_rt_index_lo) + 1) + \

	(IPA_MEM_PART(v6_modem_rt_index_hi) - \

		IPA_MEM_PART(v6_modem_rt_index_lo) + 1))



/* To be on the safe side */

#define IPA_Q6_CLEANUP_EXP_AGGR_MAX_CMDS \
@@ -1066,18 +1068,16 @@ int ipa_init_q6_smem(void) 


	ipa_inc_client_enable_clks();



	rc = ipa_init_smem_region(IPA_v2_RAM_MODEM_SIZE,

				  IPA_v2_RAM_MODEM_OFST);



	rc = ipa_init_smem_region(IPA_MEM_PART(modem_size),

		IPA_MEM_PART(modem_ofst));

	if (rc) {

		IPAERR("failed to initialize Modem RAM memory\n");

		ipa_dec_client_disable_clks();

		return rc;

	}



	rc = ipa_init_smem_region(IPA_v2_RAM_MODEM_HDR_SIZE,

				  IPA_v2_RAM_MODEM_HDR_OFST);



	rc = ipa_init_smem_region(IPA_MEM_PART(modem_hdr_size),

		IPA_MEM_PART(modem_hdr_ofst));

	if (rc) {

		IPAERR("failed to initialize Modem HDRs RAM memory\n");

		ipa_dec_client_disable_clks();
@@ -1218,7 +1218,7 @@ static int ipa_q6_clean_q6_tables(void) 
			cmd[num_cmds].system_addr = mem.phys_base;

			cmd[num_cmds].local_addr =

				ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V4_FLT_OFST + 8 + pipe_idx*4;

				IPA_MEM_PART(v4_flt_ofst) + 8 + pipe_idx * 4;



			desc[num_cmds].opcode = IPA_DMA_SHARED_MEM;

			desc[num_cmds].pyld = &cmd[num_cmds];
@@ -1230,7 +1230,7 @@ static int ipa_q6_clean_q6_tables(void) 
			cmd[num_cmds].system_addr =  mem.phys_base;

			cmd[num_cmds].local_addr =

				ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V6_FLT_OFST + 8 + pipe_idx*4;

				IPA_MEM_PART(v6_flt_ofst) + 8 + pipe_idx * 4;



			desc[num_cmds].opcode = IPA_DMA_SHARED_MEM;

			desc[num_cmds].pyld = &cmd[num_cmds];
@@ -1241,12 +1241,13 @@ static int ipa_q6_clean_q6_tables(void) 
	}



	/* Need to point v4/v6 modem routing tables to an empty table */

	for (index = IPA_v2_V4_MODEM_RT_INDEX_LO; index <=

		IPA_v2_V4_MODEM_RT_INDEX_HI; index++) {

	for (index = IPA_MEM_PART(v4_modem_rt_index_lo);

		 index <= IPA_MEM_PART(v4_modem_rt_index_hi);

		 index++) {

		cmd[num_cmds].size = mem.size;

		cmd[num_cmds].system_addr =  mem.phys_base;

		cmd[num_cmds].local_addr = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_V4_RT_OFST + index*4;

			IPA_MEM_PART(v4_rt_ofst) + index * 4;



		desc[num_cmds].opcode = IPA_DMA_SHARED_MEM;

		desc[num_cmds].pyld = &cmd[num_cmds];
@@ -1255,12 +1256,13 @@ static int ipa_q6_clean_q6_tables(void) 
		num_cmds++;

	}



	for (index = IPA_v2_V6_MODEM_RT_INDEX_LO; index <=

		IPA_v2_V6_MODEM_RT_INDEX_HI; index++) {

	for (index = IPA_MEM_PART(v6_modem_rt_index_lo);

		 index <= IPA_MEM_PART(v6_modem_rt_index_hi);

		 index++) {

		cmd[num_cmds].size = mem.size;

		cmd[num_cmds].system_addr =  mem.phys_base;

		cmd[num_cmds].local_addr = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_V6_RT_OFST + index*4;

			IPA_MEM_PART(v6_rt_ofst) + index * 4;



		desc[num_cmds].opcode = IPA_DMA_SHARED_MEM;

		desc[num_cmds].pyld = &cmd[num_cmds];
@@ -1476,15 +1478,15 @@ static int ipa_init_sram(void) 


#define IPA_SRAM_SET(ofst, val) (ipa_sram_mmio[(ofst - 4) / 4] = val)



	IPA_SRAM_SET(IPA_v2_RAM_V6_FLT_OFST - 4, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_V6_FLT_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_V4_RT_OFST - 4, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_V4_RT_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_V6_RT_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_MODEM_HDR_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_MODEM_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_APPS_V4_FLT_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_v2_RAM_UC_INFO_OFST, IPA_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst) - 4, IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(v4_rt_ofst) - 4, IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(v4_rt_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(v6_rt_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(modem_hdr_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(modem_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(apps_v4_flt_ofst), IPA_MEM_CANARY_VAL);

	IPA_SRAM_SET(IPA_MEM_PART(uc_info_ofst), IPA_MEM_CANARY_VAL);



	iounmap(ipa_sram_mmio);
@@ -1521,7 +1523,7 @@ static int ipa_init_hdr(void) 
	struct ipa_hdr_init_local cmd;

	int rc = 0;



	mem.size = IPA_v2_RAM_MODEM_HDR_SIZE + IPA_v2_RAM_APPS_HDR_SIZE;

	mem.size = IPA_MEM_PART(modem_hdr_size) + IPA_MEM_PART(apps_hdr_size);

	mem.base = dma_alloc_coherent(ipa_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1533,7 +1535,7 @@ static int ipa_init_hdr(void) 
	cmd.hdr_table_src_addr = mem.phys_base;

	cmd.size_hdr_table = mem.size;

	cmd.hdr_table_dst_addr = ipa_ctx->smem_restricted_bytes +

		IPA_v2_RAM_MODEM_HDR_OFST;

		IPA_MEM_PART(modem_hdr_ofst);



	desc.opcode = IPA_HDR_INIT_LOCAL;

	desc.pyld = &cmd;
@@ -1559,12 +1561,13 @@ static int ipa_init_rt4(void) 
	int i;

	int rc = 0;



	for (i = IPA_v2_V4_MODEM_RT_INDEX_LO;

			i <= IPA_v2_V4_MODEM_RT_INDEX_HI; i++)

	for (i = IPA_MEM_PART(v4_modem_rt_index_lo);

		i <= IPA_MEM_PART(v4_modem_rt_index_hi);

		i++)

		ipa_ctx->rt_idx_bitmap[IPA_IP_v4] |= (1 << i);

	IPADBG("v4 rt bitmap 0x%lx\n", ipa_ctx->rt_idx_bitmap[IPA_IP_v4]);



	mem.size = IPA_v2_RAM_V4_RT_SIZE;

	mem.size = IPA_MEM_PART(v4_rt_size);

	mem.base = dma_alloc_coherent(ipa_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1573,7 +1576,7 @@ static int ipa_init_rt4(void) 
	}



	entry = mem.base;

	for (i = 0; i < IPA_v2_RAM_V4_NUM_INDEX; i++) {

	for (i = 0; i < IPA_MEM_PART(v4_num_index); i++) {

		*entry = ipa_ctx->empty_rt_tbl_mem.phys_base;

		entry++;

	}
@@ -1582,7 +1585,7 @@ static int ipa_init_rt4(void) 
	v4_cmd.ipv4_rules_addr = mem.phys_base;

	v4_cmd.size_ipv4_rules = mem.size;

	v4_cmd.ipv4_addr = ipa_ctx->smem_restricted_bytes +

		IPA_v2_RAM_V4_RT_OFST;

		IPA_MEM_PART(v4_rt_ofst);

	IPADBG("putting Routing IPv4 rules to phys 0x%x",

				v4_cmd.ipv4_addr);
@@ -1609,12 +1612,13 @@ static int ipa_init_rt6(void) 
	int i;

	int rc = 0;



	for (i = IPA_v2_V6_MODEM_RT_INDEX_LO;

			i <= IPA_v2_V6_MODEM_RT_INDEX_HI; i++)

	for (i = IPA_MEM_PART(v6_modem_rt_index_lo);

		i <= IPA_MEM_PART(v6_modem_rt_index_hi);

		i++)

		ipa_ctx->rt_idx_bitmap[IPA_IP_v6] |= (1 << i);

	IPADBG("v6 rt bitmap 0x%lx\n", ipa_ctx->rt_idx_bitmap[IPA_IP_v6]);



	mem.size = IPA_v2_RAM_V6_RT_SIZE;

	mem.size = IPA_MEM_PART(v6_rt_size);

	mem.base = dma_alloc_coherent(ipa_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1623,7 +1627,7 @@ static int ipa_init_rt6(void) 
	}



	entry = mem.base;

	for (i = 0; i < IPA_v2_RAM_V6_NUM_INDEX; i++) {

	for (i = 0; i < IPA_MEM_PART(v6_num_index); i++) {

		*entry = ipa_ctx->empty_rt_tbl_mem.phys_base;

		entry++;

	}
@@ -1632,7 +1636,7 @@ static int ipa_init_rt6(void) 
	v6_cmd.ipv6_rules_addr = mem.phys_base;

	v6_cmd.size_ipv6_rules = mem.size;

	v6_cmd.ipv6_addr = ipa_ctx->smem_restricted_bytes +

		IPA_v2_RAM_V6_RT_OFST;

		IPA_MEM_PART(v6_rt_ofst);

	IPADBG("putting Routing IPv6 rules to phys 0x%x",

				v6_cmd.ipv6_addr);
@@ -1659,7 +1663,7 @@ static int ipa_init_flt4(void) 
	int i;

	int rc = 0;



	mem.size = IPA_v2_RAM_V4_FLT_SIZE;

	mem.size = IPA_MEM_PART(v4_flt_size);

	mem.base = dma_alloc_coherent(ipa_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1681,7 +1685,7 @@ static int ipa_init_flt4(void) 
	v4_cmd.ipv4_rules_addr = mem.phys_base;

	v4_cmd.size_ipv4_rules = mem.size;

	v4_cmd.ipv4_addr = ipa_ctx->smem_restricted_bytes +

		IPA_v2_RAM_V4_FLT_OFST;

		IPA_MEM_PART(v4_flt_ofst);

	IPADBG("putting Filtering IPv4 rules to phys 0x%x",

				v4_cmd.ipv4_addr);
@@ -1708,7 +1712,7 @@ static int ipa_init_flt6(void) 
	int i;

	int rc = 0;



	mem.size = IPA_v2_RAM_V6_FLT_SIZE;

	mem.size = IPA_MEM_PART(v6_flt_size);

	mem.base = dma_alloc_coherent(ipa_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1730,7 +1734,7 @@ static int ipa_init_flt6(void) 
	v6_cmd.ipv6_rules_addr = mem.phys_base;

	v6_cmd.size_ipv6_rules = mem.size;

	v6_cmd.ipv6_addr = ipa_ctx->smem_restricted_bytes +

		IPA_v2_RAM_V6_FLT_OFST;

		IPA_MEM_PART(v6_flt_ofst);

	IPADBG("putting Filtering IPv6 rules to phys 0x%x",

				v6_cmd.ipv6_addr);

drivers/platform/msm/ipa/ipa_flt.c

+32 −26
Original line number Diff line number Diff line
@@ -642,12 +642,12 @@ int __ipa_commit_flt_v1(enum ipa_ip_type ip) 
	}



	if (ip == IPA_IP_v4) {

		avail = ipa_ctx->ip4_flt_tbl_lcl ? IPA_v1_RAM_V4_FLT_SIZE :

			IPA_RAM_V4_FLT_SIZE_DDR;

		avail = ipa_ctx->ip4_flt_tbl_lcl ? IPA_MEM_v1_RAM_V4_FLT_SIZE :

			IPA_MEM_PART(v4_flt_size_ddr);

		size = sizeof(struct ipa_ip_v4_filter_init);

	} else {

		avail = ipa_ctx->ip6_flt_tbl_lcl ? IPA_v1_RAM_V6_FLT_SIZE :

			IPA_RAM_V6_FLT_SIZE_DDR;

		avail = ipa_ctx->ip6_flt_tbl_lcl ? IPA_MEM_v1_RAM_V6_FLT_SIZE :

			IPA_MEM_PART(v6_flt_size_ddr);

		size = sizeof(struct ipa_ip_v6_filter_init);

	}

	cmd = kmalloc(size, GFP_KERNEL);
@@ -671,13 +671,13 @@ int __ipa_commit_flt_v1(enum ipa_ip_type ip) 
		desc.opcode = IPA_IP_V4_FILTER_INIT;

		v4->ipv4_rules_addr = mem->phys_base;

		v4->size_ipv4_rules = mem->size;

		v4->ipv4_addr = IPA_v1_RAM_V4_FLT_OFST;

		v4->ipv4_addr = IPA_MEM_v1_RAM_V4_FLT_OFST;

	} else {

		v6 = (struct ipa_ip_v6_filter_init *)cmd;

		desc.opcode = IPA_IP_V6_FILTER_INIT;

		v6->ipv6_rules_addr = mem->phys_base;

		v6->size_ipv6_rules = mem->size;

		v6->ipv6_addr = IPA_v1_RAM_V6_FLT_OFST;

		v6->ipv6_addr = IPA_MEM_v1_RAM_V6_FLT_OFST;

	}



	desc.pyld = cmd;
@@ -722,11 +722,11 @@ static int ipa_generate_flt_hw_tbl_v2(enum ipa_ip_type ip, 
	u32 hdr_top;



	if (ip == IPA_IP_v4)

		body_start_offset = IPA_v2_RAM_APPS_V4_FLT_OFST -

			IPA_v2_RAM_V4_FLT_OFST;

		body_start_offset = IPA_MEM_PART(apps_v4_flt_ofst) -

			IPA_MEM_PART(v4_flt_ofst);

	else

		body_start_offset = IPA_v2_RAM_APPS_V6_FLT_OFST -

			IPA_v2_RAM_V6_FLT_OFST;

		body_start_offset = IPA_MEM_PART(apps_v6_flt_ofst) -

			IPA_MEM_PART(v6_flt_ofst);



	num_words = 7;

	head1->size = num_words * 4;
@@ -832,20 +832,22 @@ int __ipa_commit_flt_v2(enum ipa_ip_type ip) 
	}



	if (ip == IPA_IP_v4) {

		avail = ipa_ctx->ip4_flt_tbl_lcl ? IPA_v2_RAM_APPS_V4_FLT_SIZE :

			IPA_RAM_V4_FLT_SIZE_DDR;

		avail = ipa_ctx->ip4_flt_tbl_lcl ?

			IPA_MEM_PART(apps_v4_flt_size) :

			IPA_MEM_PART(v4_flt_size_ddr);

		local_addrh = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_V4_FLT_OFST + 4;

			IPA_MEM_PART(v4_flt_ofst) + 4;

		local_addrb = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_APPS_V4_FLT_OFST;

			IPA_MEM_PART(apps_v4_flt_ofst);

		lcl = ipa_ctx->ip4_flt_tbl_lcl;

	} else {

		avail = ipa_ctx->ip6_flt_tbl_lcl ? IPA_v2_RAM_APPS_V6_FLT_SIZE :

			IPA_RAM_V6_FLT_SIZE_DDR;

		avail = ipa_ctx->ip6_flt_tbl_lcl ?

			IPA_MEM_PART(apps_v6_flt_size) :

			IPA_MEM_PART(v6_flt_size_ddr);

		local_addrh = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_V6_FLT_OFST + 4;

			IPA_MEM_PART(v6_flt_ofst) + 4;

		local_addrb = ipa_ctx->smem_restricted_bytes +

			IPA_v2_RAM_APPS_V6_FLT_OFST;

			IPA_MEM_PART(apps_v6_flt_ofst);

		lcl = ipa_ctx->ip6_flt_tbl_lcl;

	}
@@ -884,10 +886,12 @@ int __ipa_commit_flt_v2(enum ipa_ip_type ip) 


		if (ip == IPA_IP_v4) {

			local_addrh = ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V4_FLT_OFST + 8 + i * 4;

				IPA_MEM_PART(v4_flt_ofst) +

				8 + i * 4;

		} else {

			local_addrh = ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V6_FLT_OFST + 8 + i * 4;

				IPA_MEM_PART(v6_flt_ofst) +

				8 + i * 4;

		}

		cmd[num_desc].size = 4;

		cmd[num_desc].system_addr = head1.phys_base + 4 + i * 4;
@@ -908,10 +912,12 @@ int __ipa_commit_flt_v2(enum ipa_ip_type ip) 


		if (ip == IPA_IP_v4) {

			local_addrh = ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V4_FLT_OFST + 13 * 4 + (i - 11) * 4;

				IPA_MEM_PART(v4_flt_ofst) +

				13 * 4 + (i - 11) * 4;

		} else {

			local_addrh = ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_V6_FLT_OFST + 13 * 4 + (i - 11) * 4;

				IPA_MEM_PART(v6_flt_ofst) +

				13 * 4 + (i - 11) * 4;

		}

		cmd[num_desc].size = 4;

		cmd[num_desc].system_addr = head2.phys_base + (i - 11) * 4;
@@ -993,8 +999,8 @@ static int __ipa_add_flt_rule(struct ipa_flt_tbl *tbl, enum ipa_ip_type ip, 
			}

		} else {

			if (rule->rt_tbl_idx > ((ip == IPA_IP_v4) ?

					IPA_v2_V4_MODEM_RT_INDEX_HI :

					IPA_v2_V6_MODEM_RT_INDEX_HI)) {

				IPA_MEM_PART(v4_modem_rt_index_hi) :

				IPA_MEM_PART(v6_modem_rt_index_hi))) {

				IPAERR("invalid RT tbl\n");

				goto error;

			}
@@ -1108,8 +1114,8 @@ static int __ipa_mdfy_flt_rule(struct ipa_flt_rule_mdfy *frule, 
			}

		} else {

			if (frule->rule.rt_tbl_idx > ((ip == IPA_IP_v4) ?

					IPA_v2_V4_MODEM_RT_INDEX_HI :

					IPA_v2_V6_MODEM_RT_INDEX_HI)) {

				IPA_MEM_PART(v4_modem_rt_index_hi) :

				IPA_MEM_PART(v6_modem_rt_index_hi))) {

				IPAERR("invalid RT tbl\n");

				goto error;

			}

drivers/platform/msm/ipa/ipa_hdr.c

+10 −10
Original line number Diff line number Diff line
@@ -87,15 +87,15 @@ int __ipa_commit_hdr_v1(void) 
	}



	if (ipa_ctx->hdr_tbl_lcl) {

		if (mem->size > IPA_v1_RAM_HDR_SIZE) {

		if (mem->size > IPA_MEM_v1_RAM_HDR_SIZE) {

			IPAERR("tbl too big, needed %d avail %d\n", mem->size,

				IPA_v1_RAM_HDR_SIZE);

				IPA_MEM_v1_RAM_HDR_SIZE);

			goto fail_send_cmd;

		}

	} else {

		if (mem->size > IPA_RAM_HDR_SIZE_DDR) {

		if (mem->size > IPA_MEM_PART(apps_hdr_size_ddr)) {

			IPAERR("tbl too big, needed %d avail %d\n", mem->size,

				IPA_RAM_HDR_SIZE_DDR);

				IPA_MEM_PART(apps_hdr_size_ddr));

			goto fail_send_cmd;

		}

	}
@@ -103,7 +103,7 @@ int __ipa_commit_hdr_v1(void) 
	cmd->hdr_table_src_addr = mem->phys_base;

	if (ipa_ctx->hdr_tbl_lcl) {

		cmd->size_hdr_table = mem->size;

		cmd->hdr_table_dst_addr = IPA_v1_RAM_HDR_OFST;

		cmd->hdr_table_dst_addr = IPA_MEM_v1_RAM_HDR_OFST;

		desc.opcode = IPA_HDR_INIT_LOCAL;

	} else {

		desc.opcode = IPA_HDR_INIT_SYSTEM;
@@ -161,24 +161,24 @@ int __ipa_commit_hdr_v2(void) 
	}



	if (ipa_ctx->hdr_tbl_lcl) {

		if (mem.size > IPA_v2_RAM_APPS_HDR_SIZE) {

		if (mem.size > IPA_MEM_PART(apps_hdr_size)) {

			IPAERR("tbl too big, needed %d avail %d\n", mem.size,

				IPA_v2_RAM_APPS_HDR_SIZE);

				IPA_MEM_PART(apps_hdr_size));

			goto end;

		} else {

			dma_cmd.system_addr = mem.phys_base;

			dma_cmd.size = mem.size;

			dma_cmd.local_addr = ipa_ctx->smem_restricted_bytes +

				IPA_v2_RAM_APPS_HDR_OFST;

				IPA_MEM_PART(apps_hdr_ofst);

			desc.opcode = IPA_DMA_SHARED_MEM;

			desc.pyld = &dma_cmd;

			desc.len =

				sizeof(struct ipa_hw_imm_cmd_dma_shared_mem);

		}

	} else {

		if (mem.size > IPA_RAM_HDR_SIZE_DDR) {

		if (mem.size > IPA_MEM_PART(apps_hdr_size_ddr)) {

			IPAERR("tbl too big, needed %d avail %d\n", mem.size,

				IPA_RAM_HDR_SIZE_DDR);

				IPA_MEM_PART(apps_hdr_size_ddr));

			goto end;

		} else {

			cmd.hdr_table_addr = mem.phys_base;

drivers/platform/msm/ipa/ipa_i.h

+49 −0
Original line number Diff line number Diff line
@@ -127,6 +127,8 @@ 
#define IPA_RT_FLT_HW_RULE_BUF_SIZE	(128)



#define MAX_RESOURCE_TO_CLIENTS (5)

#define IPA_MEM_PART(x_) (ipa_ctx->ctrl->mem_partition.x_)



struct ipa_client_names {

	enum ipa_client_type names[MAX_RESOURCE_TO_CLIENTS];

	int length;
@@ -862,7 +864,54 @@ struct ipa_plat_drv_res { 
	u32 ee;

};



struct ipa_mem_partition {

	u16 ofst_start;

	u16 nat_ofst;

	u16 nat_size;

	u16 v4_flt_ofst;

	u16 v4_flt_size;

	u16 v4_flt_size_ddr;

	u16 v6_flt_ofst;

	u16 v6_flt_size;

	u16 v6_flt_size_ddr;

	u16 v4_rt_ofst;

	u16 v4_num_index;

	u16 v4_modem_rt_index_lo;

	u16 v4_modem_rt_index_hi;

	u16 v4_apps_rt_index_lo;

	u16 v4_apps_rt_index_hi;

	u16 v4_rt_size;

	u16 v4_rt_size_ddr;

	u16 v6_rt_ofst;

	u16 v6_num_index;

	u16 v6_modem_rt_index_lo;

	u16 v6_modem_rt_index_hi;

	u16 v6_apps_rt_index_lo;

	u16 v6_apps_rt_index_hi;

	u16 v6_rt_size;

	u16 v6_rt_size_ddr;

	u16 modem_hdr_ofst;

	u16 modem_hdr_size;

	u16 apps_hdr_ofst;

	u16 apps_hdr_size;

	u16 apps_hdr_size_ddr;

	u16 modem_ofst;

	u16 modem_size;

	u16 apps_v4_flt_ofst;

	u16 apps_v4_flt_size;

	u16 apps_v6_flt_ofst;

	u16 apps_v6_flt_size;

	u16 uc_info_ofst;

	u16 uc_info_size;

	u16 end_ofst;

	u16 apps_v4_rt_ofst;

	u16 apps_v4_rt_size;

	u16 apps_v6_rt_ofst;

	u16 apps_v6_rt_size;

};



struct ipa_controller {

	struct ipa_mem_partition mem_partition;

	u32 ipa_clk_rate_hi;

	u32 ipa_clk_rate_lo;

	u32 clock_scaling_bw_threshold;

drivers/platform/msm/ipa/ipa_qmi_service.c

+14 −13
Original line number Diff line number Diff line
@@ -339,24 +339,25 @@ static int qmi_init_modem_send_sync_msg(void) 
	req.platform_type_valid = true;

	req.platform_type = ipa_wan_platform;

	req.hdr_tbl_info_valid = true;

	req.hdr_tbl_info.modem_offset_start = IPA_v2_RAM_MODEM_HDR_OFST + 256;

	req.hdr_tbl_info.modem_offset_end = IPA_v2_RAM_MODEM_HDR_OFST + 256

		+ IPA_v2_RAM_MODEM_HDR_SIZE - 1;

	req.hdr_tbl_info.modem_offset_start =

		IPA_MEM_PART(modem_hdr_ofst) + 256;

	req.hdr_tbl_info.modem_offset_end = IPA_MEM_PART(modem_hdr_ofst) +

		256 + IPA_MEM_PART(modem_hdr_size) - 1;

	req.v4_route_tbl_info_valid = true;

	req.v4_route_tbl_info.route_tbl_start_addr =

		IPA_v2_RAM_V4_RT_OFST + 256;

	req.v4_route_tbl_info.num_indices = IPA_v2_V4_MODEM_RT_INDEX_HI;

	req.v4_route_tbl_info.route_tbl_start_addr = IPA_MEM_PART(v4_rt_ofst) +

		256;

	req.v4_route_tbl_info.num_indices = IPA_MEM_PART(v4_modem_rt_index_hi);

	req.v6_route_tbl_info_valid = true;

	req.v6_route_tbl_info.route_tbl_start_addr =

		IPA_v2_RAM_V6_RT_OFST + 256;

	req.v6_route_tbl_info.num_indices = IPA_v2_V6_MODEM_RT_INDEX_HI;

	req.v6_route_tbl_info.route_tbl_start_addr = IPA_MEM_PART(v6_rt_ofst) +

		256;

	req.v6_route_tbl_info.num_indices = IPA_MEM_PART(v6_modem_rt_index_hi);

	req.v4_filter_tbl_start_addr_valid = true;

	req.v4_filter_tbl_start_addr = IPA_v2_RAM_V4_FLT_OFST + 256;

	req.v4_filter_tbl_start_addr = IPA_MEM_PART(v4_flt_ofst) + 256;

	req.v6_filter_tbl_start_addr_valid = true;

	req.v6_filter_tbl_start_addr = IPA_v2_RAM_V6_FLT_OFST + 256;

	req.v6_filter_tbl_start_addr = IPA_MEM_PART(v6_flt_ofst) + 256;

	req.modem_mem_info_valid = true;

	req.modem_mem_info.block_start_addr = IPA_v2_RAM_MODEM_OFST + 256;

	req.modem_mem_info.size = IPA_v2_RAM_MODEM_SIZE;

	req.modem_mem_info.block_start_addr = IPA_MEM_PART(modem_ofst) + 256;

	req.modem_mem_info.size = IPA_MEM_PART(modem_size);

	req.ctrl_comm_dest_end_pt_valid = true;

	req.ctrl_comm_dest_end_pt =

		ipa_get_ep_mapping(IPA_CLIENT_APPS_WAN_CONS);