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Commit 9f68ff9e authored by Jesper Nilsson's avatar Jesper Nilsson
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CRIS v32: Clean up nandflash.c for ARTPEC-3 and ETRAX FS.

Clean up issues noticed by Andrew Morton:

- Use a combined struct for allocating the mtd_info and nand_chip structs
  instead of using anonymous memory as the example in
  Documentation/DocBook/mtdnand.tmpl
- Use kzalloc instead of using kmalloc/memset(0)
- Make crisv32_device_ready static.
parent ad433f23
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+12 −10
Original line number Original line Diff line number Diff line
@@ -35,6 +35,11 @@
#define ALE_BIT 11
#define ALE_BIT 11
#define CE_BIT 12
#define CE_BIT 12


struct mtd_info_wrapper {
	struct mtd_info info;
	struct nand_chip chip;
};

/* Bitmask for control pins */
/* Bitmask for control pins */
#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))


@@ -88,7 +93,7 @@ static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
/*
/*
*	read device ready pin
*	read device ready pin
*/
*/
int crisv32_device_ready(struct mtd_info *mtd)
static int crisv32_device_ready(struct mtd_info *mtd)
{
{
	reg_pio_r_din din = REG_RD(pio, regi_pio, r_din);
	reg_pio_r_din din = REG_RD(pio, regi_pio, r_din);
	return din.rdy;
	return din.rdy;
@@ -102,6 +107,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	void __iomem *read_cs;
	void __iomem *read_cs;
	void __iomem *write_cs;
	void __iomem *write_cs;


	struct mtd_info_wrapper *wrapper;
	struct nand_chip *this;
	struct nand_chip *this;
	int err = 0;
	int err = 0;


@@ -129,9 +135,8 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	REG_WR(pio, regi_pio, rw_oe, oe);
	REG_WR(pio, regi_pio, rw_oe, oe);


	/* Allocate memory for MTD device structure and private data */
	/* Allocate memory for MTD device structure and private data */
	crisv32_mtd = kmalloc(sizeof(struct mtd_info) +
	wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL);
		sizeof(struct nand_chip), GFP_KERNEL);
	if (!wrapper) {
	if (!crisv32_mtd) {
		printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
		printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
			"device structure.\n");
			"device structure.\n");
		err = -ENOMEM;
		err = -ENOMEM;
@@ -142,11 +147,8 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
		rw_io_access0);
		rw_io_access0);


	/* Get pointer to private data */
	/* Get pointer to private data */
	this = (struct nand_chip *) (&crisv32_mtd[1]);
	this = &wrapper->chip;

	crisv32_mtd = &wrapper->info;
	/* Initialize structures */
	memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
	memset((char *) this, 0, sizeof(struct nand_chip));


	/* Link the private data with the MTD structure */
	/* Link the private data with the MTD structure */
	crisv32_mtd->priv = this;
	crisv32_mtd->priv = this;
@@ -172,7 +174,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	return crisv32_mtd;
	return crisv32_mtd;


out_mtd:
out_mtd:
	kfree(crisv32_mtd);
	kfree(wrapper);
	return NULL;
	return NULL;
}
}
+12 −10
Original line number Original line Diff line number Diff line
@@ -30,6 +30,11 @@
#define ALE_BIT 6
#define ALE_BIT 6
#define BY_BIT 7
#define BY_BIT 7


struct mtd_info_wrapper {
	struct mtd_info info;
	struct nand_chip chip;
};

/* Bitmask for control pins */
/* Bitmask for control pins */
#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))


@@ -83,7 +88,7 @@ static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
/*
/*
*	read device ready pin
*	read device ready pin
*/
*/
int crisv32_device_ready(struct mtd_info *mtd)
static int crisv32_device_ready(struct mtd_info *mtd)
{
{
	reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din);
	reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din);
	return ((din.data & (1 << BY_BIT)) >> BY_BIT);
	return ((din.data & (1 << BY_BIT)) >> BY_BIT);
@@ -100,13 +105,13 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core,
	reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core,
		rw_grp3_cfg);
		rw_grp3_cfg);
	reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe);
	reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe);
	struct mtd_info_wrapper *wrapper;
	struct nand_chip *this;
	struct nand_chip *this;
	int err = 0;
	int err = 0;


	/* Allocate memory for MTD device structure and private data */
	/* Allocate memory for MTD device structure and private data */
	crisv32_mtd = kmalloc(sizeof(struct mtd_info) +
	wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL);
		sizeof(struct nand_chip), GFP_KERNEL);
	if (!wrapper) {
	if (!crisv32_mtd) {
		printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
		printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
			"device structure.\n");
			"device structure.\n");
		err = -ENOMEM;
		err = -ENOMEM;
@@ -123,7 +128,8 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	}
	}


	/* Get pointer to private data */
	/* Get pointer to private data */
	this = (struct nand_chip *) (&crisv32_mtd[1]);
	this = &wrapper->chip;
	crisv32_mtd = &wrapper->info;


	pa_oe.oe |= 1 << CE_BIT;
	pa_oe.oe |= 1 << CE_BIT;
	pa_oe.oe |= 1 << ALE_BIT;
	pa_oe.oe |= 1 << ALE_BIT;
@@ -135,10 +141,6 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
	bif_cfg.gated_csp1 = regk_bif_core_wr;
	bif_cfg.gated_csp1 = regk_bif_core_wr;
	REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
	REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);


	/* Initialize structures */
	memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
	memset((char *) this, 0, sizeof(struct nand_chip));

	/* Link the private data with the MTD structure */
	/* Link the private data with the MTD structure */
	crisv32_mtd->priv = this;
	crisv32_mtd->priv = this;


@@ -166,7 +168,7 @@ out_ior:
	iounmap((void *)read_cs);
	iounmap((void *)read_cs);
	iounmap((void *)write_cs);
	iounmap((void *)write_cs);
out_mtd:
out_mtd:
	kfree(crisv32_mtd);
	kfree(wrapper);
	return NULL;
	return NULL;
}
}