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Commit 9ca1d10d authored by Eric Anholt's avatar Eric Anholt Committed by Keith Packard
Browse files

drm/i915: Turn on another required clock gating bit on gen6. 



Unlike the previous one, I don't have known testcases it fixes.  I'd
rather not go through the same debug cycle on whatever testcases those
might be.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Cc: stable@kernel.org
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
parent 406478dc

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -3446,6 +3446,7 @@ 


#define GEN6_UCGCTL2				0x9404

# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE		(1 << 12)

# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE		(1 << 11)



#define GEN6_RPNSWREQ				0xA008

#define   GEN6_TURBO_DISABLE			(1<<31)

drivers/gpu/drm/i915/intel_display.c

+6 −1
Original line number Diff line number Diff line
@@ -8154,8 +8154,13 @@ static void gen6_init_clock_gating(struct drm_device *dev) 
	 * some amount of runtime in the Mesa "fire" demo, and Unigine

	 * Sanctuary and Tropics, and apparently anything else with

	 * alpha test or pixel discard.

	 *

	 * According to the spec, bit 11 (RCCUNIT) must also be set,

	 * but we didn't debug actual testcases to find it out.

	 */

	I915_WRITE(GEN6_UCGCTL2, GEN6_RCPBUNIT_CLOCK_GATE_DISABLE);

	I915_WRITE(GEN6_UCGCTL2,

		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |

		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);



	/*

	 * According to the spec the following bits should be