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Commit 9bf13854 authored by Karthik Parsha's avatar Karthik Parsha Committed by Mahesh Sivasubramanian
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msm: spm-devices: Use phandle to identify the cpu vctl device. 



Voltage change requests for a cpu rail need to be handled by a
spm device that is capable of it. Use a list of cpu phandle to
identify which spm device can handle a cpu's voltage request.
Use the voltage control capable spm device to route the voltage
change request.

Older targets may not support the use of phandles. Such targets
can provide a cpumask as an entry in the spm device node in
place of a phandle.

With the ability to dynamically lookup the voltage control spm
device, there is no need to specifically save the l2 spm device
data. Remove all references to l2_spm_device.

Change-Id: I44182c6bce8c53b40c865036e45177ad15cb52e1
Signed-off-by: default avatarKarthik Parsha <kparsha@codeaurora.org>
Signed-off-by: default avatarMurali Nalajala <mnalajal@codeaurora.org>
parent 60d75479

Documentation/devicetree/bindings/arm/msm/spm-v2.txt

+29 −5
Original line number Diff line number Diff line
@@ -50,12 +50,12 @@ Optional properties 
	proc won't inform the RPM.

- qcom,saw2-spm-cmd-pc: The Power Collapse command sequence

- qcom,saw2-spm-cmd-gdhs: L2 GDHS command sequence

- qcom,L2-spm-is-apcs-master: Boolean indicates if the target uses L2 SAW to

	control the gang rail. If this is not specified the driver assumes

	that the cpus run with their own separate rails and each cpu's spm

	talks to its regulator.

- qcom,cpu-vctl-mask: Mask of cpus, whose voltage the spm device can control.

	Depricated: Replaced with cpu-vctl-list when cpu phandles are available.

- qcom,cpu-vctl-list: List of cpu node phandles, whose voltage the spm device

	can control.



Example:

Example 1:

	qcom,spm@f9089000 {

		compatible = "qcom,spm-v2";

		#address-cells = <1>;
@@ -70,6 +70,7 @@ Example: 
		qcom,saw2-avs-dly= <0>;

		qcom,saw2-spm-dly= <0x20000400>;

		qcom,saw2-spm-ctl = <0x1>;

		qcom,cpu-vctl-mask = <0xf>;

		qcom,saw2-spm-cmd-wfi = [03 0b 0f];

		qcom,saw2-spm-cmd-spc = [00 20 50 80 60 70 10 92

				a0 b0 03 68 70 3b 92 a0 b0
@@ -78,3 +79,26 @@ Example: 
				a0 b0 82 10 30 02 22 30 0f];

	};



Example 2:

	qcom,spm@f9089000 {

		compatible = "qcom,spm-v2";

		#address-cells = <1>;

		#size-cells = <1>;

		reg = <0xf9089000 0x1000>;

		qcom,core-id = <0>;

		qcom,saw2-ver-reg = <0xfd0>;

		qcom,saw2-cfg = <0x1b>;

		qcom,saw2-avs-ctl = <0>;

		qcom,saw2-avs-hysteresis = <0>;

		qcom,saw2-avs-limit = <0>;

		qcom,saw2-avs-dly= <0>;

		qcom,saw2-spm-dly= <0x20000400>;

		qcom,saw2-spm-ctl = <0x1>;

		qcom,cpu-vctl-list = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,saw2-spm-cmd-wfi = [03 0b 0f];

		qcom,saw2-spm-cmd-spc = [00 20 50 80 60 70 10 92

				a0 b0 03 68 70 3b 92 a0 b0

				82 2b 50 10 30 02 22 30 0f];

		qcom,saw2-spm-cmd-pc = [00 20 10 92 a0 b0 07 3b 92

				a0 b0 82 10 30 02 22 30 0f];

	};

arch/arm/boot/dts/qcom/apq8084-pm.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -128,11 +128,11 @@ 
		qcom,vctl-port = <0x0>;

		qcom,phase-port = <0x1>;

		qcom,pfm-port = <0x2>;

		qcom,cpu-vctl-mask = <0xf>;

		qcom,saw2-spm-cmd-ret = [1f 00 20 03 22 00 0f];

		qcom,saw2-spm-cmd-gdhs = [00 20 32 42 03 44 22 50 02 32 50 0f];

		qcom,saw2-spm-cmd-pc = [00 22 12 32 b0 11 42 07 01 b0 12 22

				44 50 02 32 50 0f];

		qcom,L2-spm-is-apcs-master;

	};



	qcom,lpm-levels {

arch/arm/boot/dts/qcom/mdm9630-pm.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
		qcom,saw2-cfg = <0x101>;

		qcom,saw2-spm-dly= <0>;

		qcom,saw2-spm-ctl = <0x1>;

		qcom,cpu-vctl-mask = <0x1>;

		qcom,saw2-spm-cmd-wfi = [04 03 04 0f];

		qcom,saw2-spm-cmd-spc = [34 04 44 24 54 03 5a 24 44 04 3a 0f];

		qcom,saw2-spm-cmd-pc = [34 04 14 24 54 07 5a 24 14 04 3e 0f];

arch/arm/boot/dts/qcom/msm8226-v1-pm.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -100,11 +100,11 @@ 
		qcom,vctl-port = <0x0>;

		qcom,phase-port = <0x1>;

		qcom,pfm-port = <0x2>;

		qcom,cpu-vctl-mask = <0xf>;

		qcom,saw2-spm-cmd-ret = [00 03 00 0f];

		qcom,saw2-spm-cmd-pc = [00 32 b0 10 e0 d0 6b c0 42 f0

				11 07 01 b0 50 4e 02 02 c0 d0 12 e0 6b 02 32

				50 f0 0f]; /*APCS_PMIC_OFF_L2RAM_OFF*/

		qcom,L2-spm-is-apcs-master;

	};



	qcom,lpm-levels {

arch/arm/boot/dts/qcom/msm8226-v2-pm.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -100,13 +100,13 @@ 
		qcom,vctl-port = <0x0>;

		qcom,phase-port = <0x1>;

		qcom,pfm-port = <0x2>;

		qcom,cpu-vctl-mask = <0xf>;

		qcom,saw2-spm-cmd-ret = [00 03 00 0f];

		qcom,saw2-spm-cmd-gdhs = [00 20 32 6b c0 e0 d0 42 03 50

				4e 02 02 d0 e0 c0 22 6b 02 32 50 0f];

		qcom,saw2-spm-cmd-pc = [00 32 b0 10 e0 d0 6b c0 42 f0

				11 07 01 b0 50 4e 02 02 c0 d0 12 e0 6b 02 32

				50 f0 0f]; /*APCS_PMIC_OFF_L2RAM_OFF*/

		qcom,L2-spm-is-apcs-master;

	};



	qcom,lpm-levels {