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Commit 9bbafce2 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Fix occasional FPU register corruption under preempt. 



Presently with preempt enabled there's the possibility to be preempted
after the TIF_USEDFPU test and the register save, leading to bogus
state post-__switch_to(). Use an explicit preempt_disable()/enable()
pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86
change.

Reported-by: default avatarTakuo Koguchi <takuo.koguchi.sw@hitachi.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 05dda977

arch/sh/kernel/cpu/sh2a/fpu.c

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/signal.h>

#include <asm/processor.h>

#include <asm/io.h>

#include <asm/fpu.h>



/* The PR (precision) bit in the FP Status Register must be clear when

 * an frchg instruction is executed, otherwise the instruction is undefined.

arch/sh/kernel/cpu/sh4/fpu.c

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <asm/cpu/fpu.h>

#include <asm/processor.h>

#include <asm/system.h>

#include <asm/fpu.h>



/* The PR (precision) bit in the FP Status Register must be clear when

 * an frchg instruction is executed, otherwise the instruction is undefined.

arch/sh/kernel/cpu/sh5/fpu.c

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <asm/processor.h>

#include <asm/user.h>

#include <asm/io.h>

#include <asm/fpu.h>



/*

 * Initially load the FPU with signalling NANS.  This bit pattern

arch/sh/kernel/dump_task.c

+1 −0
Original line number Diff line number Diff line 
#include <linux/elfcore.h>

#include <linux/sched.h>

#include <asm/fpu.h>



/*

 * Capture the user space registers if the task is not running (in user space)

arch/sh/kernel/process_32.c

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <asm/pgalloc.h>

#include <asm/system.h>

#include <asm/ubc.h>

#include <asm/fpu.h>



static int hlt_counter;

int ubc_usercnt = 0;