clock-plutonium: Model GPLL0 gating from GCC to MMSS

MMSS needs to vote enable one bit in GCC before GPLL0 signal is propagated
to MMSS clock controller. Model this bit as a gate clock.

Change-Id: Iff8a228655cb778e4cc880ce9693ac756d41dda0
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>