Loading Documentation/devicetree/bindings/iommu/msm_iommu_v1.txt +5 −3 Original line number Diff line number Diff line Loading @@ -3,10 +3,12 @@ Required properties: - compatible : one of: - "qcom,msm-smmu-v1" - reg : offset and length of the register set for the device. Optional offset and length for clock register for additional clock that - reg : - offset and length of the register set for the device. - Optional offset and length for clock register for additional clock that needs to be turned on for access to this IOMMU. - reg-names: "iommu_base", "clk_base" (optional) - Optional offset and length for enabling aggregated Context bank interrupts - reg-names: "iommu_base", "clk_base" (optional), "smmu_local_base" (optional) - label: name of this IOMMU instance. Optional properties: Loading arch/arm/mach-msm/include/mach/iommu.h +1 −0 Original line number Diff line number Diff line Loading @@ -112,6 +112,7 @@ struct msm_iommu_drvdata { void __iomem *base; void __iomem *glb_base; void __iomem *cb_base; void __iomem *smmu_local_base; int ncb; int ttbr_split; struct clk *clk; Loading arch/arm/mach-msm/include/mach/iommu_hw-v1.h +4 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -1036,6 +1036,9 @@ do { \ #define SMR (0x0800) #define S2CR (0x0C00) /* SMMU_LOCAL */ #define SMMU_INTR_SEL_NS (0x2000) /* Global Register Space 1 */ #define CBAR (0x1000) #define CBFRSYNRA (0x1400) Loading drivers/iommu/msm_iommu-v1.c +17 −13 Original line number Diff line number Diff line Loading @@ -321,24 +321,28 @@ static void __program_iommu_secure(void __iomem *base) /* * May only be called for non-secure iommus */ static void __program_iommu(void __iomem *base) static void __program_iommu(struct msm_iommu_drvdata *drvdata) { __reset_iommu(base); __reset_iommu(drvdata->base); if (!msm_iommu_get_scm_call_avail()) __reset_iommu_secure(base); __reset_iommu_secure(drvdata->base); SET_CR0_SMCFCFG(base, 1); SET_CR0_USFCFG(base, 1); SET_CR0_STALLD(base, 1); SET_CR0_GCFGFIE(base, 1); SET_CR0_GCFGFRE(base, 1); SET_CR0_GFIE(base, 1); SET_CR0_GFRE(base, 1); SET_CR0_CLIENTPD(base, 0); SET_CR0_SMCFCFG(drvdata->base, 1); SET_CR0_USFCFG(drvdata->base, 1); SET_CR0_STALLD(drvdata->base, 1); SET_CR0_GCFGFIE(drvdata->base, 1); SET_CR0_GCFGFRE(drvdata->base, 1); SET_CR0_GFIE(drvdata->base, 1); SET_CR0_GFRE(drvdata->base, 1); SET_CR0_CLIENTPD(drvdata->base, 0); if (!msm_iommu_get_scm_call_avail()) __program_iommu_secure(base); __program_iommu_secure(drvdata->base); if (drvdata->smmu_local_base) writel_relaxed(0xFFFFFFFF, drvdata->smmu_local_base + SMMU_INTR_SEL_NS); mb(); /* Make sure writes complete before returning */ } Loading Loading @@ -689,7 +693,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) if (!iommu_drvdata->ctx_attach_count) { if (!is_secure) { iommu_halt(iommu_drvdata); __program_iommu(iommu_drvdata->base); __program_iommu(iommu_drvdata); iommu_resume(iommu_drvdata); } else { ret = msm_iommu_sec_program_iommu( Loading drivers/iommu/msm_iommu_dev-v1.c +9 −0 Original line number Diff line number Diff line Loading @@ -309,6 +309,15 @@ static int msm_iommu_probe(struct platform_device *pdev) if (!drvdata->base) return -ENOMEM; r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smmu_local_base"); if (r) { drvdata->smmu_local_base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); if (!drvdata->smmu_local_base) return -ENOMEM; } drvdata->glb_base = drvdata->base; if (of_get_property(pdev->dev.of_node, "vdd-supply", NULL)) { Loading Loading
Documentation/devicetree/bindings/iommu/msm_iommu_v1.txt +5 −3 Original line number Diff line number Diff line Loading @@ -3,10 +3,12 @@ Required properties: - compatible : one of: - "qcom,msm-smmu-v1" - reg : offset and length of the register set for the device. Optional offset and length for clock register for additional clock that - reg : - offset and length of the register set for the device. - Optional offset and length for clock register for additional clock that needs to be turned on for access to this IOMMU. - reg-names: "iommu_base", "clk_base" (optional) - Optional offset and length for enabling aggregated Context bank interrupts - reg-names: "iommu_base", "clk_base" (optional), "smmu_local_base" (optional) - label: name of this IOMMU instance. Optional properties: Loading
arch/arm/mach-msm/include/mach/iommu.h +1 −0 Original line number Diff line number Diff line Loading @@ -112,6 +112,7 @@ struct msm_iommu_drvdata { void __iomem *base; void __iomem *glb_base; void __iomem *cb_base; void __iomem *smmu_local_base; int ncb; int ttbr_split; struct clk *clk; Loading
arch/arm/mach-msm/include/mach/iommu_hw-v1.h +4 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -1036,6 +1036,9 @@ do { \ #define SMR (0x0800) #define S2CR (0x0C00) /* SMMU_LOCAL */ #define SMMU_INTR_SEL_NS (0x2000) /* Global Register Space 1 */ #define CBAR (0x1000) #define CBFRSYNRA (0x1400) Loading
drivers/iommu/msm_iommu-v1.c +17 −13 Original line number Diff line number Diff line Loading @@ -321,24 +321,28 @@ static void __program_iommu_secure(void __iomem *base) /* * May only be called for non-secure iommus */ static void __program_iommu(void __iomem *base) static void __program_iommu(struct msm_iommu_drvdata *drvdata) { __reset_iommu(base); __reset_iommu(drvdata->base); if (!msm_iommu_get_scm_call_avail()) __reset_iommu_secure(base); __reset_iommu_secure(drvdata->base); SET_CR0_SMCFCFG(base, 1); SET_CR0_USFCFG(base, 1); SET_CR0_STALLD(base, 1); SET_CR0_GCFGFIE(base, 1); SET_CR0_GCFGFRE(base, 1); SET_CR0_GFIE(base, 1); SET_CR0_GFRE(base, 1); SET_CR0_CLIENTPD(base, 0); SET_CR0_SMCFCFG(drvdata->base, 1); SET_CR0_USFCFG(drvdata->base, 1); SET_CR0_STALLD(drvdata->base, 1); SET_CR0_GCFGFIE(drvdata->base, 1); SET_CR0_GCFGFRE(drvdata->base, 1); SET_CR0_GFIE(drvdata->base, 1); SET_CR0_GFRE(drvdata->base, 1); SET_CR0_CLIENTPD(drvdata->base, 0); if (!msm_iommu_get_scm_call_avail()) __program_iommu_secure(base); __program_iommu_secure(drvdata->base); if (drvdata->smmu_local_base) writel_relaxed(0xFFFFFFFF, drvdata->smmu_local_base + SMMU_INTR_SEL_NS); mb(); /* Make sure writes complete before returning */ } Loading Loading @@ -689,7 +693,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) if (!iommu_drvdata->ctx_attach_count) { if (!is_secure) { iommu_halt(iommu_drvdata); __program_iommu(iommu_drvdata->base); __program_iommu(iommu_drvdata); iommu_resume(iommu_drvdata); } else { ret = msm_iommu_sec_program_iommu( Loading
drivers/iommu/msm_iommu_dev-v1.c +9 −0 Original line number Diff line number Diff line Loading @@ -309,6 +309,15 @@ static int msm_iommu_probe(struct platform_device *pdev) if (!drvdata->base) return -ENOMEM; r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smmu_local_base"); if (r) { drvdata->smmu_local_base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); if (!drvdata->smmu_local_base) return -ENOMEM; } drvdata->glb_base = drvdata->base; if (of_get_property(pdev->dev.of_node, "vdd-supply", NULL)) { Loading