Merge "ARM: dts: msm: Add crypto device tree data for msm8992"

		reg = <0xfe80f720 0x2000>;

	};

	qcom: qcrypto@fd440000 {

		compatible = "qcom,qcrypto";

		reg = <0xfd440000 0x20000>,

		      <0xfd444000 0x9000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 236 0>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <1>;

		qcom,ce-device = <0>;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<55 512 0 0>,

				<55 512 3936000 393600>;

		clock-names = "core_clk_src", "iface_clk", "bus_clk";

		clocks = <&clock_rpm clk_qcrypto_ce2_clk>,

			 <&clock_rpm clk_gcc_ce2_ahb_m_clk>,

			 <&clock_rpm clk_gcc_ce2_axi_m_clk>;

		qcom,support-core-clk-only;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,ce-opp-freq = <171430000>;

	};

	qcom_cedev: qcedev@fd440000 {

		compatible = "qcom,qcedev";

		reg = <0xfd440000 0x20000>,

		      <0xfd444000 0x9000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 236 0>;

		qcom,bam-pipe-pair = <1>;

		qcom,ce-hw-instance = <1>;

		qcom,ce-device = <0>;

		qcom,msm-bus,name = "qcedev-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<55 512 0 0>,

				<55 512 3936000 393600>;

		clock-names = "core_clk_src", "iface_clk", "bus_clk";

		clocks = <&clock_rpm clk_qcedev_ce2_clk>,

			 <&clock_rpm clk_gcc_ce2_ahb_m_clk>,

			 <&clock_rpm clk_gcc_ce2_axi_m_clk>;

		qcom,support-core-clk-only;

		qcom,ce-opp-freq = <171430000>;

	};

	qcom,sensor-information {

		compatible = "qcom,sensor-information";

		sensor_information0: qcom,sensor-information@0 {