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Commit 95b16467 authored by Aravind Kumar's avatar Aravind Kumar
Browse files

ASoC: wcd9xxx: modify sequence post SSR 



Perform mux configuration before MBHC init.
Otherwise, MLCK will not be enabled which results
in wrong initial calibration of dce and sta.
Updating the mux configuration for class h dsm mux
during codec bring up after ssr is causing the
widget not to be powered up as the dapm sees no
change in the register associated with it. The change
ensures the mux register is not updated post SSR.

Change-Id: I4d181de29816d51b0a70b82bd057256844d34387
Signed-off-by: default avatarAravind Kumar <akumark@codeaurora.org>
parent d420d8ef

sound/soc/codecs/wcd9306.c

+5 −5
Original line number Diff line number Diff line
@@ -5592,7 +5592,7 @@ static const struct tapan_reg_mask_val tapan_codec_reg_init_val[] = { 
	{TAPAN_A_CDC_CONN_MISC, 0x04, 0x04},



	/* CLASS H config */

	{TAPAN_A_CDC_CONN_CLSH_CTL, 0x3C, 0x14},

	{TAPAN_A_CDC_CONN_CLSH_CTL, 0x30, 0x10},



	/* Use 16 bit sample size for TX1 to TX5 */

	{TAPAN_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
@@ -6100,8 +6100,6 @@ static int tapan_post_reset_cb(struct wcd9xxx *wcd9xxx) 
	codec = (struct snd_soc_codec *)(wcd9xxx->ssr_priv);

	tapan = snd_soc_codec_get_drvdata(codec);



	snd_soc_card_change_online_state(codec->card, 1);



	mutex_lock(&codec->mutex);

	if (codec->reg_def_copy) {

		pr_debug("%s: Update ASOC cache", __func__);
@@ -6115,6 +6113,10 @@ static int tapan_post_reset_cb(struct wcd9xxx *wcd9xxx) 
		}

	}



	tapan->machine_codec_event_cb(codec, WCD9XXX_CODEC_EVENT_CODEC_UP);



	snd_soc_card_change_online_state(codec->card, 1);



	if (spkr_drv_wrnd == 1)

		snd_soc_update_bits(codec, TAPAN_A_SPKR_DRV_EN, 0x80, 0x80);
@@ -6150,8 +6152,6 @@ static int tapan_post_reset_cb(struct wcd9xxx *wcd9xxx) 
	if (ret)

		pr_err("%s: Failed to setup irq: %d\n", __func__, ret);



	tapan->machine_codec_event_cb(codec, WCD9XXX_CODEC_EVENT_CODEC_UP);



	for (count = 0; count < NUM_CODEC_DAIS; count++)

		tapan->dai[count].bus_down_in_recovery = true;