msm: clock-mdss: Update the PLL lock sequence for 8x26

During suspend/resume stress tests, the DSI PLL is not getting
locked after MDDF1CE sequence. Update the PLL lock sequence for
8x26 with the recommended and fine tuned settings. The new sequence
is now MMDDF1CE. Also, update the PLL_LKDET_CFG2 setting for 8974.

Change-Id: Ieef831ea48e6d2b95621f87dee5dc655f448bbe4
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>