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Commit 94c52e4c authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: tspp2: Remove clock names from device tree"

parents e605d929 74e02079

Documentation/devicetree/bindings/arm/msm/msm_tspp2.txt

+3 −15
Original line number Diff line number Diff line
@@ -18,13 +18,6 @@ Required properties: 
	TSIF_TSPP2, TSIF0, TSIF1, TSIF_BAM.

- interrupt-names: TSPP2, TSIF and BAM interrupt names.

- vdd-supply: power regulator (GDSC) supplying power to the broadcast subsystem.

- qcom,tspp2-ahb-clk: TSPP2 AHB clock name.

- qcom,tspp2-core-clk: TSPP2 core clock name.

- qcom,tspp2-vbif-clk: TSPP2 VBIF clock name.

- qcom,tspp2-klm-ahb-clk: TSPP2 key ladder AHB clock name.

- qcom,tsif-ref-clk: TSIF reference clock name.

	The driver uses clk_get to get the clocks by name. The clocks

	should be defined in the relevant clock file (e.g. clock-8092.c).

Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt"

for more information on the following four properties:

- qcom,msm-bus,name: String representing the client name ("tspp2").
@@ -34,18 +27,18 @@ for more information on the following four properties: 
- qcom,msm-bus,vectors-KBps: represents the bandwidths required for the above

	usecases.

- qcom,iommu-hlos-group: Name of the Broadcast HLOS IOMMU domain as defined in

	<target>-iommu-domains.dtsi, (e.g. mpq8092-iommu-domains.dtsi).

	<target>-iommu-domains.dtsi.

	The Broadcast HLOS IOMMU domain includes a context bank and virtual

	address pools definitions, used for mapping non-secured pipe memory

	buffers.

- qcom,iommu-hlos-partition: Partition number in the HLOS IOMMU domain.

- qcom,iommu-cpz-group: Name of the Broadcast CPZ IOMMU domain as defined in

	<target>-iommu-domains.dtsi, (e.g. mpq8092-iommu-domains.dtsi).

	<target>-iommu-domains.dtsi.

	The Broadcast CPZ IOMMU domain includes a context bank and virtual

	address pool definitions, used for mapping secured pipe memory buffers.

- qcom,iommu-cpz-partition: Partition number in the CPZ IOMMU domain.



Example (for MPQ8092 platform, avaialble at mpq8092.dtsi):

Example:



	tspp2: msm_tspp2@fc724000 {

		compatible = "qcom,msm_tspp2";
@@ -67,11 +60,6 @@ Example (for MPQ8092 platform, avaialble at mpq8092.dtsi): 
			"TSIF1",

			"TSPP2_BAM";

		vdd-supply = <&gdsc_bcss>;

		qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk";

		qcom,tspp2-core-clk = "bcc_tspp2_core_clk";

		qcom,tspp2-vbif-clk = "bcc_vbif_tspp2_clk";

		qcom,tspp2-klm-ahb-clk = "bcc_klm_ahb_clk";

		qcom,tsif-ref-clk = "gcc_tsif_ref_clk";

		qcom,msm-bus,name = "tspp2";

		qcom,msm-bus,num-cases = <3>;

		qcom,msm-bus,num-paths = <1>;

arch/arm/boot/dts/qcom/mpq8092.dtsi

+0 −5
Original line number Diff line number Diff line
@@ -1420,11 +1420,6 @@ 
			"TSIF1",

			"TSPP2_BAM";

		vdd-supply = <&gdsc_bcss>;

		qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk";

		qcom,tspp2-core-clk = "bcc_tspp2_core_clk";

		qcom,tspp2-vbif-clk = "bcc_vbif_tspp2_clk";

		qcom,tspp2-klm-ahb-clk = "bcc_klm_ahb_clk";

		qcom,tsif-ref-clk = "gcc_tsif_ref_clk";

		qcom,msm-bus,name = "tspp2";

		qcom,msm-bus,num-cases = <3>;

		qcom,msm-bus,num-paths = <1>;

arch/arm/mach-msm/include/mach/msm_tspp2.h

+1 −11
Original line number Diff line number Diff line 
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.

/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -30,22 +30,12 @@ 
/**

 * struct msm_tspp2_platform_data - TSPP2 platform data

 *

 * @tspp2_ahb_clk:		TSPP2 device AHB clock name.

 * @tspp2_core_clk:		TSPP2 device core clock name.

 * @tspp2_vbif_clk:		TSPP2 VBIF clock name.

 * @tspp2_klm_ahb_clk:		TSPP2 key ladder AHB clock name.

 * @tsif_ref_clk:		TSIF device reference clock name.

 * @hlos_group:			IOMMU HLOS group name.

 * @cpz_group:			IOMMU CPZ group name.

 * @hlos_partition:		IOMMU HLOS partition number.

 * @cpz_partition:		IOMMU CPZ partition number.

 */

struct msm_tspp2_platform_data {

	const char *tspp2_ahb_clk;

	const char *tspp2_core_clk;

	const char *tspp2_vbif_clk;

	const char *tspp2_klm_ahb_clk;

	const char *tsif_ref_clk;

	const char *hlos_group;

	const char *cpz_group;

	int hlos_partition;

drivers/media/platform/msm/broadcast/tspp2.c

+33 −94
Original line number Diff line number Diff line
@@ -246,9 +246,6 @@ enum tspp2_operation_opcode { 
/* Bits for TSPP2_GLOBAL_IRQ_CLEAR register */

#define GLOBAL_IRQ_CLEAR_RESERVED_OFFS		4



/* Bits for TSPP2_GLOBAL_IRQ_ENABLE register */

#define GLOBAL_IRQ_ENABLE_READ_FAIL_OFFS	16



/* Bits for TSPP2_VERSION register */

#define VERSION_MAJOR_OFFS			28

#define VERSION_MINOR_OFFS			16
@@ -7274,10 +7271,10 @@ int tspp2_src_event_notification_register(u32 src_handle, 
	reg = readl_relaxed(src->device->base + TSPP2_GLOBAL_IRQ_ENABLE);

	if (callback && (src_event_bitmask & TSPP2_SRC_EVENT_FLOW_CTRL_STALL)) {

		reg |= ((0x1 << src->hw_index) <<

			GLOBAL_IRQ_ENABLE_READ_FAIL_OFFS);

			GLOBAL_IRQ_FC_STALL_OFFS);

	} else {

		reg &= ~((0x1 << src->hw_index) <<

			GLOBAL_IRQ_ENABLE_READ_FAIL_OFFS);

			GLOBAL_IRQ_FC_STALL_OFFS);

	}

	writel_relaxed(reg, src->device->base + TSPP2_GLOBAL_IRQ_ENABLE);
@@ -7491,43 +7488,6 @@ msm_tspp2_dt_to_pdata(struct platform_device *pdev) 
		return NULL;

	}



	/* Get clocks information */

	rc = of_property_read_string(node, "qcom,tspp2-ahb-clk",

					&data->tspp2_ahb_clk);

	if (rc) {

		pr_err("%s: Could not find tspp2-ahb-clk property, err = %d\n",

			__func__, rc);

		return NULL;

	}

	rc = of_property_read_string(node, "qcom,tspp2-core-clk",

					&data->tspp2_core_clk);

	if (rc) {

		pr_err("%s: Could not find tspp2-core-clk property, err = %d\n",

			__func__, rc);

		return NULL;

	}

	rc = of_property_read_string(node, "qcom,tspp2-vbif-clk",

					&data->tspp2_vbif_clk);

	if (rc) {

		pr_err("%s: Could not find tspp2-vbif-clk property, err = %d\n",

			__func__, rc);

		return NULL;

	}

	rc = of_property_read_string(node, "qcom,tspp2-klm-ahb-clk",

					&data->tspp2_klm_ahb_clk);

	if (rc) {

		pr_err("%s: Could not find tspp2-klm-ahb-clk property, err = %d\n",

			__func__, rc);

		return NULL;

	}

	rc = of_property_read_string(node, "qcom,tsif-ref-clk",

			&data->tsif_ref_clk);

	if (rc) {

		pr_err("%s: Could not find tsif-ref-clk property, err = %d\n",

			__func__, rc);

		return NULL;

	}



	/* Get IOMMU information */

	rc = of_property_read_string(node, "qcom,iommu-hlos-group",

					&data->hlos_group);
@@ -7705,8 +7665,6 @@ static int msm_tspp2_clocks_setup(struct platform_device *pdev, 
	unsigned long rate_in_hz = 0;

	struct clk *tspp2_core_clk_src = NULL;



	struct msm_tspp2_platform_data *data = pdev->dev.platform_data;



	/* Get power regulator (GDSC) */

	device->gdsc = devm_regulator_get(&pdev->dev, "vdd");

	if (IS_ERR(device->gdsc)) {
@@ -7724,41 +7682,29 @@ static int msm_tspp2_clocks_setup(struct platform_device *pdev, 
	device->tspp2_klm_ahb_clk = NULL;

	device->tsif_ref_clk = NULL;



	if (data->tspp2_ahb_clk) {

		device->tspp2_ahb_clk =

			clk_get(&pdev->dev, data->tspp2_ahb_clk);

	device->tspp2_ahb_clk = clk_get(&pdev->dev, "bcc_tspp2_ahb_clk");

	if (IS_ERR(device->tspp2_ahb_clk)) {

			pr_err("%s: Failed to get %s",

				__func__, data->tspp2_ahb_clk);

		pr_err("%s: Failed to get %s", __func__, "bcc_tspp2_ahb_clk");

		ret = PTR_ERR(device->tspp2_ahb_clk);

		device->tspp2_ahb_clk = NULL;

		goto err_clocks;

	}

	}



	if (data->tspp2_core_clk) {

		device->tspp2_core_clk =

			clk_get(&pdev->dev, data->tspp2_core_clk);

	device->tspp2_core_clk = clk_get(&pdev->dev, "bcc_tspp2_core_clk");

	if (IS_ERR(device->tspp2_core_clk)) {

			pr_err("%s: Failed to get %s",

				__func__, data->tspp2_core_clk);

		pr_err("%s: Failed to get %s", __func__, "bcc_tspp2_core_clk");

		ret = PTR_ERR(device->tspp2_core_clk);

		device->tspp2_core_clk = NULL;

		goto err_clocks;

	}

	}



	if (data->tspp2_vbif_clk) {

		device->tspp2_vbif_clk =

			clk_get(&pdev->dev, data->tspp2_vbif_clk);

	device->tspp2_vbif_clk = clk_get(&pdev->dev, "bcc_vbif_tspp2_clk");

	if (IS_ERR(device->tspp2_vbif_clk)) {

			pr_err("%s: Failed to get %s",

				__func__, data->tspp2_vbif_clk);

		pr_err("%s: Failed to get %s", __func__, "bcc_vbif_tspp2_clk");

		ret = PTR_ERR(device->tspp2_vbif_clk);

		device->tspp2_vbif_clk = NULL;

		goto err_clocks;

	}

	}



	device->vbif_ahb_clk = clk_get(&pdev->dev, "iface_vbif_clk");

	if (IS_ERR(device->vbif_ahb_clk)) {
@@ -7776,34 +7722,27 @@ static int msm_tspp2_clocks_setup(struct platform_device *pdev, 
		goto err_clocks;

	}



	if (data->tspp2_klm_ahb_clk) {

		device->tspp2_klm_ahb_clk =

			clk_get(&pdev->dev, data->tspp2_klm_ahb_clk);

	device->tspp2_klm_ahb_clk = clk_get(&pdev->dev, "bcc_klm_ahb_clk");

	if (IS_ERR(device->tspp2_klm_ahb_clk)) {

			pr_err("%s: Failed to get %s",

				__func__, data->tspp2_klm_ahb_clk);

		pr_err("%s: Failed to get %s", __func__, "bcc_klm_ahb_clk");

		ret = PTR_ERR(device->tspp2_klm_ahb_clk);

		device->tspp2_klm_ahb_clk = NULL;

		goto err_clocks;

	}

	}



	if (data->tsif_ref_clk) {

		device->tsif_ref_clk = clk_get(&pdev->dev, data->tsif_ref_clk);

	device->tsif_ref_clk = clk_get(&pdev->dev, "gcc_tsif_ref_clk");

	if (IS_ERR(device->tsif_ref_clk)) {

			pr_err("%s: Failed to get %s",

				__func__, data->tsif_ref_clk);

		pr_err("%s: Failed to get %s", __func__, "gcc_tsif_ref_clk");

		ret = PTR_ERR(device->tsif_ref_clk);

		device->tsif_ref_clk = NULL;

		goto err_clocks;

	}

	}



	/* Set relevant clock rates */

	rate_in_hz = clk_round_rate(device->tsif_ref_clk, 1);

	if (clk_set_rate(device->tsif_ref_clk, rate_in_hz)) {

		pr_err("%s: Failed to set rate %lu to %s\n", __func__,

			rate_in_hz, data->tsif_ref_clk);

			rate_in_hz, "gcc_tsif_ref_clk");

		goto err_clocks;

	}