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Commit 94a03b04 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable HSUART node"

parents c56da6d2 efd2d650

arch/arm/boot/dts/qcom/msm8992-pinctrl.dtsi

+23 −0
Original line number Diff line number Diff line
@@ -43,6 +43,29 @@ 
				bias-pull-down;

			};

		};



		blsp2_uart2_active {

			qcom,pins = <&gp 45>, <&gp 46>, <&gp 47>, <&gp 48>;

			qcom,num-grp-pins = <4>;

			qcom,pin-func = <2>;

		        label = "blsp2_uart2_active";

			hsuart_active: default {

				drive-strength = <16>;

				bias-disable;

			};

		};



		blsp2_uart2_sleep {

			qcom,pins = <&gp 45>, <&gp 46>, <&gp 47>, <&gp 48>;

			qcom,num-grp-pins = <4>;

			qcom,pin-func = <0>;

		        label = "blsp2_uart2_sleep";

			hsuart_sleep: sleep {

				drive-strength = <2>;

				bias-disable;

			};

		};



		/* SDC pin type */

		sdc: sdc {

			/* 0-3 for sdc1 4-6 for sdc2 */

arch/arm/boot/dts/qcom/msm8992-sim.dts

+4 −0
Original line number Diff line number Diff line
@@ -28,6 +28,10 @@ 
	status = "ok";

};



&blsp2_uart2 {

	status = "ok";

};



&sdhc_1 {

	vdd-supply = <&pm8994_l20>;

	qcom,vdd-voltage-level = <2950000 2950000>;

arch/arm/boot/dts/qcom/msm8992.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -301,6 +301,43 @@ 
			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;

	};



	blsp2_uart2: uart@f995e000 { /* BLSP2 UART2 */

		compatible = "qcom,msm-hsuart-v14";

		reg = <0xf995e000 0x1000>,

			<0xf9944000 0x19000>;

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart2>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 114 0

				1 &intc 0 239 0

				2 &msm_gpio 46 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;



		qcom,bam-tx-ep-pipe-index = <2>;

		qcom,bam-rx-ep-pipe-index = <3>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>,

			<&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&hsuart_sleep>;

		pinctrl-1 = <&hsuart_active>;



		qcom,msm-bus,name = "buart8";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<84 512 0 0>,

				<84 512 500 800>;

		status = "disabled";

	};



	clock_gcc: qcom,gcc@fc400000 {

		compatible = "qcom,dummycc";

		#clock-cells = <1>;