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Commit 94421a5e authored by Yan He's avatar Yan He
Browse files

msm: pcie: add the option for reference clock type



Add the option to support both external reference clock and
internal reference clock.

Change-Id: I45591eb83c3efafc56aa2b81e39f18039d28bd79
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent cf0a8e3d
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+2 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ Optional Properties:
    support L1ss.
  - qcom,msi-gicm-addr: MSI address for GICv2m.
  - qcom,msi-gicm-base: MSI IRQ base for GICv2m.
  - qcom,ext-ref-clk: The reference clock is external.

Example:

@@ -111,4 +112,5 @@ Example:
		qcom,aux-clk-sync;
		qcom,msi-gicm-addr = <0xf9040040>;
		qcom,msi-gicm-base = <0x160>;
		qcom,ext-ref-clk;
	};
+6 −0
Original line number Diff line number Diff line
@@ -1237,6 +1237,12 @@ static int msm_pcie_probe(struct platform_device *pdev)
	PCIE_DBG("AUX clock is %s synchronous to Core clock.\n",
		msm_pcie_dev[rc_idx].aux_clk_sync ? "" : "not");

	msm_pcie_dev[rc_idx].ext_ref_clk =
		of_property_read_bool((&pdev->dev)->of_node,
				"qcom,ext-ref-clk");
	PCIE_DBG("ref clk is %s.\n",
		msm_pcie_dev[rc_idx].ext_ref_clk ? "external" : "internal");

	msm_pcie_dev[rc_idx].msi_gicm_addr = 0;
	msm_pcie_dev[rc_idx].msi_gicm_base = 0;
	ret = of_property_read_u32((&pdev->dev)->of_node,
+2 −1
Original line number Diff line number Diff line
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -174,6 +174,7 @@ struct msm_pcie_dev_t {

	bool                         l1ss_supported;
	bool                         aux_clk_sync;
	bool                         ext_ref_clk;

	uint32_t                     rc_idx;
	bool                         enumerated;