Loading arch/arm/boot/dts/mpq8092-sim.dts +41 −0 Original line number Diff line number Diff line Loading @@ -97,6 +97,47 @@ status = "ok"; }; &sdhc_1 { vdd-supply = <&pma8084_l20>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <0 500000>; vdd-io-supply = <&pma8084_s4>; qcom,vdd-io-always-on; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 154000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,nonremovable; status = "disabled"; }; &sdhc_2 { vdd-supply = <&pma8084_l21>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 800000>; vdd-io-supply = <&pma8084_l13>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <6 22000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; status = "disabled"; }; &pma8084_gpios { gpio@c000 { /* GPIO 1 */ }; Loading arch/arm/boot/dts/mpq8092.dtsi +56 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,8 @@ aliases { i2c2 = &i2c_2; spi1 = &spi_1; sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ }; soc: soc { }; Loading Loading @@ -272,6 +274,60 @@ status = "disabled"; }; sdhc_1: sdhci@f9824900 { compatible = "qcom,sdhci-msm"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 123 0>, <0 138 0>; interrupt-names = "hc_irq", "pwr_irq"; qcom,bus-width = <8>; qcom,msm-bus,name = "sdhc1"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ <78 512 1600 3200>, /* 400 KB/s*/ <78 512 80000 160000>, /* 20 MB/s */ <78 512 100000 200000>, /* 25 MB/s */ <78 512 200000 400000>, /* 50 MB/s */ <78 512 400000 800000>, /* 100 MB/s */ <78 512 400000 800000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_2: sdhci@f98a4900 { compatible = "qcom,sdhci-msm"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 125 0>, <0 221 0>; interrupt-names = "hc_irq", "pwr_irq"; qcom,bus-width = <4>; qcom,msm-bus,name = "sdhc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 1600 3200>, /* 400 KB/s*/ <81 512 80000 160000>, /* 20 MB/s */ <81 512 100000 200000>, /* 25 MB/s */ <81 512 200000 400000>, /* 50 MB/s */ <81 512 400000 800000>, /* 100 MB/s */ <81 512 400000 800000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; qcom,sps@f9980000 { compatible = "qcom,msm_sps"; reg = <0xf9984000 0x15000>, Loading Loading
arch/arm/boot/dts/mpq8092-sim.dts +41 −0 Original line number Diff line number Diff line Loading @@ -97,6 +97,47 @@ status = "ok"; }; &sdhc_1 { vdd-supply = <&pma8084_l20>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <0 500000>; vdd-io-supply = <&pma8084_s4>; qcom,vdd-io-always-on; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 154000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,nonremovable; status = "disabled"; }; &sdhc_2 { vdd-supply = <&pma8084_l21>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 800000>; vdd-io-supply = <&pma8084_l13>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <6 22000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; status = "disabled"; }; &pma8084_gpios { gpio@c000 { /* GPIO 1 */ }; Loading
arch/arm/boot/dts/mpq8092.dtsi +56 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,8 @@ aliases { i2c2 = &i2c_2; spi1 = &spi_1; sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ }; soc: soc { }; Loading Loading @@ -272,6 +274,60 @@ status = "disabled"; }; sdhc_1: sdhci@f9824900 { compatible = "qcom,sdhci-msm"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 123 0>, <0 138 0>; interrupt-names = "hc_irq", "pwr_irq"; qcom,bus-width = <8>; qcom,msm-bus,name = "sdhc1"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ <78 512 1600 3200>, /* 400 KB/s*/ <78 512 80000 160000>, /* 20 MB/s */ <78 512 100000 200000>, /* 25 MB/s */ <78 512 200000 400000>, /* 50 MB/s */ <78 512 400000 800000>, /* 100 MB/s */ <78 512 400000 800000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_2: sdhci@f98a4900 { compatible = "qcom,sdhci-msm"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0 125 0>, <0 221 0>; interrupt-names = "hc_irq", "pwr_irq"; qcom,bus-width = <4>; qcom,msm-bus,name = "sdhc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 1600 3200>, /* 400 KB/s*/ <81 512 80000 160000>, /* 20 MB/s */ <81 512 100000 200000>, /* 25 MB/s */ <81 512 200000 400000>, /* 50 MB/s */ <81 512 400000 800000>, /* 100 MB/s */ <81 512 400000 800000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; qcom,sps@f9980000 { compatible = "qcom,msm_sps"; reg = <0xf9984000 0x15000>, Loading