Loading drivers/mtd/devices/msm_qpic_nand.c +62 −41 Original line number Diff line number Diff line Loading @@ -1365,14 +1365,16 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, uint32_t rdata; /* read_location register parameters */ uint32_t offset, size, last_read; static uint32_t prev_rdata; cmd = *curr_cmd; msm_nand_prep_ce(cmd, MSM_NAND_FLASH_CMD(info), WRITE, data->cmd, if (curr_cw == args->start_sector) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_CMD(info), WRITE, data->cmd, ((curr_cw == args->start_sector) ? SPS_IOVEC_FLAG_LOCK : 0)); cmd++; if (curr_cw == args->start_sector) { msm_nand_prep_ce(cmd, MSM_NAND_ADDR0(info), WRITE, data->addr0, 0); cmd++; Loading @@ -1396,10 +1398,15 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, msm_nand_prep_ce(cmd, MSM_NAND_EBI2_ECC_BUF_CFG(info), WRITE, data->ecc_cfg, 0); cmd++; } if (!args->read) if (!args->read) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), WRITE, data->clrfstatus, 0); cmd++; goto sub_exec_cmd; } } if (ops->mode == MTD_OPS_RAW) { rdata = (0 << 0) | (chip->cw_size << 16) | (1 << 31); Loading @@ -1407,35 +1414,48 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, rdata, 0); cmd++; } if (ops->mode == MTD_OPS_AUTO_OOB && ops->datbuf) { if (ops->mode == MTD_OPS_AUTO_OOB) { if (ops->datbuf) { offset = 0; size = (curr_cw < (args->cwperpage - 1)) ? 516 : (512 - ((args->cwperpage - 1) << 2)); last_read = (curr_cw < (args->cwperpage - 1)) ? 1 : (ops->oobbuf ? 0 : 1); rdata = (offset << 0) | (size << 16) | (last_read << 31); msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata = (offset << 0) | (size << 16) | (last_read << 31); if (prev_rdata != rdata) { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata, 0); cmd++; prev_rdata = rdata; } } if (ops->mode == MTD_OPS_AUTO_OOB && ops->oobbuf && (curr_cw == (args->cwperpage - 1))) { if (curr_cw == (args->cwperpage - 1) && ops->oobbuf) { offset = 512 - ((args->cwperpage - 1) << 2); size = (args->cwperpage) << 2; if (size > args->oob_len_cmd) size = args->oob_len_cmd; args->oob_len_cmd -= size; last_read = 1; rdata = (offset << 0) | (size << 16) | (last_read << 31); if (ops->datbuf) { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_1(info), rdata = (offset << 0) | (size << 16) | (last_read << 31); if (ops->datbuf) msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_1(info), WRITE, rdata, 0); } else { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), else msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata, 0); } cmd++; } } if (curr_cw == (args->cwperpage - 1)) prev_rdata = 0; sub_exec_cmd: msm_nand_prep_ce(cmd, MSM_NAND_EXEC_CMD(info), WRITE, data->exec, SPS_IOVEC_FLAG_NWD); Loading Loading @@ -1991,14 +2011,15 @@ static int msm_nand_write_oob(struct mtd_info *mtd, loff_t to, &dma_buffer->data.flash_status[n]), 0); cmd++; msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), if (n == (cwperpage - 1)) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), WRITE, data.clrfstatus, 0); cmd++; if (n == (cwperpage - 1)) { msm_nand_prep_ce(cmd, MSM_NAND_READ_STATUS(info), WRITE, data.clrrstatus, SPS_IOVEC_FLAG_UNLOCK MSM_NAND_READ_STATUS(info), WRITE, data.clrrstatus, SPS_IOVEC_FLAG_UNLOCK | SPS_IOVEC_FLAG_INT); cmd++; } Loading Loading
drivers/mtd/devices/msm_qpic_nand.c +62 −41 Original line number Diff line number Diff line Loading @@ -1365,14 +1365,16 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, uint32_t rdata; /* read_location register parameters */ uint32_t offset, size, last_read; static uint32_t prev_rdata; cmd = *curr_cmd; msm_nand_prep_ce(cmd, MSM_NAND_FLASH_CMD(info), WRITE, data->cmd, if (curr_cw == args->start_sector) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_CMD(info), WRITE, data->cmd, ((curr_cw == args->start_sector) ? SPS_IOVEC_FLAG_LOCK : 0)); cmd++; if (curr_cw == args->start_sector) { msm_nand_prep_ce(cmd, MSM_NAND_ADDR0(info), WRITE, data->addr0, 0); cmd++; Loading @@ -1396,10 +1398,15 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, msm_nand_prep_ce(cmd, MSM_NAND_EBI2_ECC_BUF_CFG(info), WRITE, data->ecc_cfg, 0); cmd++; } if (!args->read) if (!args->read) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), WRITE, data->clrfstatus, 0); cmd++; goto sub_exec_cmd; } } if (ops->mode == MTD_OPS_RAW) { rdata = (0 << 0) | (chip->cw_size << 16) | (1 << 31); Loading @@ -1407,35 +1414,48 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops, rdata, 0); cmd++; } if (ops->mode == MTD_OPS_AUTO_OOB && ops->datbuf) { if (ops->mode == MTD_OPS_AUTO_OOB) { if (ops->datbuf) { offset = 0; size = (curr_cw < (args->cwperpage - 1)) ? 516 : (512 - ((args->cwperpage - 1) << 2)); last_read = (curr_cw < (args->cwperpage - 1)) ? 1 : (ops->oobbuf ? 0 : 1); rdata = (offset << 0) | (size << 16) | (last_read << 31); msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata = (offset << 0) | (size << 16) | (last_read << 31); if (prev_rdata != rdata) { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata, 0); cmd++; prev_rdata = rdata; } } if (ops->mode == MTD_OPS_AUTO_OOB && ops->oobbuf && (curr_cw == (args->cwperpage - 1))) { if (curr_cw == (args->cwperpage - 1) && ops->oobbuf) { offset = 512 - ((args->cwperpage - 1) << 2); size = (args->cwperpage) << 2; if (size > args->oob_len_cmd) size = args->oob_len_cmd; args->oob_len_cmd -= size; last_read = 1; rdata = (offset << 0) | (size << 16) | (last_read << 31); if (ops->datbuf) { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_1(info), rdata = (offset << 0) | (size << 16) | (last_read << 31); if (ops->datbuf) msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_1(info), WRITE, rdata, 0); } else { msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), else msm_nand_prep_ce(cmd, MSM_NAND_READ_LOCATION_0(info), WRITE, rdata, 0); } cmd++; } } if (curr_cw == (args->cwperpage - 1)) prev_rdata = 0; sub_exec_cmd: msm_nand_prep_ce(cmd, MSM_NAND_EXEC_CMD(info), WRITE, data->exec, SPS_IOVEC_FLAG_NWD); Loading Loading @@ -1991,14 +2011,15 @@ static int msm_nand_write_oob(struct mtd_info *mtd, loff_t to, &dma_buffer->data.flash_status[n]), 0); cmd++; msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), if (n == (cwperpage - 1)) { msm_nand_prep_ce(cmd, MSM_NAND_FLASH_STATUS(info), WRITE, data.clrfstatus, 0); cmd++; if (n == (cwperpage - 1)) { msm_nand_prep_ce(cmd, MSM_NAND_READ_STATUS(info), WRITE, data.clrrstatus, SPS_IOVEC_FLAG_UNLOCK MSM_NAND_READ_STATUS(info), WRITE, data.clrrstatus, SPS_IOVEC_FLAG_UNLOCK | SPS_IOVEC_FLAG_INT); cmd++; } Loading