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Commit 90843aaf authored by Bar Weiner's avatar Bar Weiner
Browse files

usb: dwc3: gadget: fix isochronous transfer TRB preparing



For isochronous transfer, the last TRB (slot TRB_NUM in the TRB pool)
is the link TRB. The link TRB is not used for transfers, and
it's not associated with a USB request.
Counting the link TRB as "preparable" TRB is wrong and so
we overrun a prepared TRB which was already associated with
a request.

Change-Id: Id29ac2fbd5e3b8e824b6aa8f88e53abf0ec1ce21
Signed-off-by: default avatarNadine Toledano <nadinet@codeaurora.org>
Signed-off-by: default avatarBar Weiner <bweiner@codeaurora.org>
parent 6399cfab
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+9 −0
Original line number Diff line number Diff line
@@ -1051,6 +1051,15 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
			trbs_left = DWC3_TRB_NUM;
	}

	/*
	 * If free_slot = DWC3_TRB_MASK-1 and trbs_left > 0 then we have a
	 * wraparound in the TRB buffer. Hence, trbs_left includes the link TRB
	 * and must be reduced by 1.
	 */
	if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
		(dep->free_slot & DWC3_TRB_MASK) == DWC3_TRB_MASK-1)
			trbs_left--;

	list_for_each_entry_safe(req, n, &dep->request_list, list) {
		unsigned	length;
		dma_addr_t	dma;