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Commit 8d71e075 authored by Mike Frysinger's avatar Mike Frysinger
Browse files

Blackfin: drop unused MMR defines that only cause bad code to be written 



Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 61f09b5a

arch/blackfin/mach-bf518/include/mach/blackfin.h

+0 −10
Original line number Diff line number Diff line
@@ -68,11 +68,6 @@ 
#endif

#endif



/* UART_IIR Register */

#define STATUS(x)	((x << 1) & 0x06)

#define STATUS_P1	0x02

#define STATUS_P0	0x01



#define BFIN_UART_NR_PORTS	2



#define OFFSET_THR              0x00	/* Transmit Holding register            */
@@ -88,11 +83,6 @@ 
#define OFFSET_SCR              0x1C	/* SCR Scratch Register                 */

#define OFFSET_GCTL             0x24	/* Global Control Register              */



/* DPMC*/

#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()

#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)

#define STOPCK_OFF STOPCK



/* PLL_DIV Masks													*/

#define CCLK_DIV1 CSEL_DIV1	/*          CCLK = VCO / 1                                  */

#define CCLK_DIV2 CSEL_DIV2	/*          CCLK = VCO / 2                                  */

arch/blackfin/mach-bf527/include/mach/blackfin.h

+0 −10
Original line number Diff line number Diff line
@@ -56,11 +56,6 @@ 
#endif

#endif



/* UART_IIR Register */

#define STATUS(x)	((x << 1) & 0x06)

#define STATUS_P1	0x02

#define STATUS_P0	0x01



#define BFIN_UART_NR_PORTS	2



#define OFFSET_THR              0x00	/* Transmit Holding register            */
@@ -76,11 +71,6 @@ 
#define OFFSET_SCR              0x1C	/* SCR Scratch Register                 */

#define OFFSET_GCTL             0x24	/* Global Control Register              */



/* DPMC*/

#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()

#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)

#define STOPCK_OFF STOPCK



/* PLL_DIV Masks													*/

#define CCLK_DIV1 CSEL_DIV1	/*          CCLK = VCO / 1                                  */

#define CCLK_DIV2 CSEL_DIV2	/*          CCLK = VCO / 2                                  */

arch/blackfin/mach-bf533/dma.c

+4 −4
Original line number Diff line number Diff line
@@ -76,12 +76,12 @@ int channel2irq(unsigned int channel) 
		ret_irq = IRQ_SPI;

		break;



	case CH_UART_RX:

		ret_irq = IRQ_UART_RX;

	case CH_UART0_RX:

		ret_irq = IRQ_UART0_RX;

		break;



	case CH_UART_TX:

		ret_irq = IRQ_UART_TX;

	case CH_UART0_TX:

		ret_irq = IRQ_UART0_TX;

		break;



	case CH_MEM_STREAM0_SRC:

arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h

+4 −4
Original line number Diff line number Diff line
@@ -131,11 +131,11 @@ struct bfin_serial_res { 
struct bfin_serial_res bfin_serial_resource[] = {

	{

	0xFFC00400,

	IRQ_UART_RX,

	IRQ_UART_ERROR,

	IRQ_UART0_RX,

	IRQ_UART0_ERROR,

#ifdef CONFIG_SERIAL_BFIN_DMA

	CH_UART_TX,

	CH_UART_RX,

	CH_UART0_TX,

	CH_UART0_RX,

#endif

#ifdef CONFIG_SERIAL_BFIN_CTSRTS

	CONFIG_UART0_CTS_PIN,

arch/blackfin/mach-bf533/include/mach/blackfin.h

+0 −7
Original line number Diff line number Diff line
@@ -43,13 +43,6 @@ 


#define BFIN_UART_NR_PORTS      1



#define CH_UART_RX CH_UART0_RX

#define CH_UART_TX CH_UART0_TX



#define IRQ_UART_ERROR IRQ_UART0_ERROR

#define IRQ_UART_RX    IRQ_UART0_RX

#define IRQ_UART_TX    IRQ_UART0_TX



#define OFFSET_THR              0x00	/* Transmit Holding register            */

#define OFFSET_RBR              0x00	/* Receive Buffer register              */

#define OFFSET_DLL              0x00	/* Divisor Latch (Low-Byte)             */