+46
−34
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Clean up the setting of the RETENABLEN bit. We need to consider
several different revisions of the PHY which all have slightly
different implementations of this hardware signal.
Version < 10020061:
- RETENABLEN bit is located in the HS_PHY_CTRL register. Clear it
to enable retention mode when entering suspend.
Version 10020061:
- There are two known revisions with different behavior. The newer
one adds PLLBTUNE and PLLITUNE fields to the HS_PHY_CTRL_COMMON
register. The PLLITUNE[1] bit actually is tied to the RETENABLEN
input signal on the PHY, so it must be set when entering suspend.
Currently the only way to check is if the device tree parameter
"qcom,set-pllbtune" is present.
- Otherwise if PLL{B,I}TUNE are not present set the
HS_PHY_CTRL_COMMON RETENABLEN bit directly.
Version 10060000:
- Uses the HS_PHY_CTRL_COMMON RETENABLEN bit directly.
Finally, move the setting of this bit outside of the multi-port
handling loop, since it's only set once per PHY.
Change-Id: I203bb9364c1c4c3d96d3c512ba631d29a8b3375e
Signed-off-by:
Jack Pham <jackp@codeaurora.org>