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Commit 8a6fece9 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: clock-krait: Read CONFIG_CTL value and the vco mask from DT"

parents 44a1d498 27f85c4f
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+6 −0
Original line number Diff line number Diff line
@@ -35,6 +35,12 @@ Optional properties:
			not need to be listed in the table. If there is no
			AVS support at all, then the whole property can be
			omitted.
- qcom,hfpll-config-val:
			A 32 bit value to be programmed into the HFPLL
			configuration control register.
- qcom,hfpll-user-vco-mask:
			The mask to be used when programming the VCO selection
			bits in the user control register.

Example:
	qcom,clock-krait@f9016000 {
+12 −3
Original line number Diff line number Diff line
@@ -56,8 +56,6 @@ static struct hfpll_data hdata = {
	.status_offset = 0x1C,

	.user_val = 0x8,
	.user_vco_mask = BIT(20),
	.config_val = 0x04D0405D,
	.low_vco_max_rate = 1248000000,
	.min_rate = 537600000UL,
	.max_rate = 2900000000UL,
@@ -595,7 +593,8 @@ static int clock_krait_8974_driver_probe(struct platform_device *pdev)
	char prop_name[] = "qcom,speedXX-pvsXX-bin-vXX";
	unsigned long *freq, cur_rate, aux_rate;
	int *uv, *ua;
	u32 *dscr;
	u32 *dscr, vco_mask, config_val;
	int ret;

	vdd_l2.regulator[0] = devm_regulator_get(dev, "l2-dig");
	if (IS_ERR(vdd_l2.regulator[0])) {
@@ -664,6 +663,16 @@ static int clock_krait_8974_driver_probe(struct platform_device *pdev)
	if (hfpll_base_init(pdev, &hfpll_l2_clk))
		return -EINVAL;

	ret = of_property_read_u32(dev->of_node, "qcom,hfpll-config-val",
			     &config_val);
	if (!ret)
		hdata.config_val = config_val;

	ret = of_property_read_u32(dev->of_node, "qcom,hfpll-user-vco-mask",
			     &vco_mask);
	if (!ret)
		hdata.user_vco_mask = vco_mask;

	get_krait_bin_format_b(pdev, &speed, &pvs, &ver);
	snprintf(prop_name, ARRAY_SIZE(prop_name),
			"qcom,speed%d-pvs%d-bin-v%d", speed, pvs, ver);
+4 −3
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ static void __hfpll_clk_init_once(struct clk *c)
		return;

	/* Configure PLL parameters for integer mode. */
	if (hd->config_val)
		writel_relaxed(hd->config_val, h->base + hd->config_offset);
	writel_relaxed(0, h->base + hd->m_offset);
	writel_relaxed(1, h->base + hd->n_offset);
@@ -141,7 +142,7 @@ static void __hfpll_clk_init_once(struct clk *c)
		rate = readl_relaxed(h->base + hd->l_offset) * h->src_rate;

		/* Pick the right VCO. */
		if (rate > hd->low_vco_max_rate)
		if (hd->user_vco_mask && rate > hd->low_vco_max_rate)
			regval |= hd->user_vco_mask;
		writel_relaxed(regval, h->base + hd->user_offset);
	}
@@ -250,7 +251,7 @@ static int hfpll_clk_set_rate(struct clk *c, unsigned long rate)
		hfpll_clk_disable(c);

	/* Pick the right VCO. */
	if (hd->user_offset) {
	if (hd->user_offset && hd->user_vco_mask) {
		u32 regval;
		regval = readl_relaxed(h->base + hd->user_offset);
		if (rate <= hd->low_vco_max_rate)
+2 −2
Original line number Diff line number Diff line
@@ -50,9 +50,9 @@ struct hfpll_data {
	const u32 status_offset;

	const u32 droop_val;
	const u32 config_val;
	u32 config_val;
	const u32 user_val;
	const u32 user_vco_mask;
	u32 user_vco_mask;
	unsigned long low_vco_max_rate;

	unsigned long min_rate;