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Commit 8a233bdc authored by Yan He's avatar Yan He
Browse files

msm: pcie: gate the core clock during L1ss 



Adjust PCIe configuration to gate PCIe core clok during L1ss.

Change-Id: I19821bca8d54dd9219f246db3e4bdf40ee6b20f8
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent c8abc4ce

arch/arm/mach-msm/pcie.c

+4 −1
Original line number Diff line number Diff line
@@ -1186,6 +1186,9 @@ int msm_pcie_enable(struct msm_pcie_dev_t *dev, u32 options) 
	/* change DBI base address */

	writel_relaxed(0, dev->parf + PCIE20_PARF_DBI_BASE_ADDR);



	if (dev->rc_idx)

		writel_relaxed(0x361c, dev->parf + PCIE20_PARF_SYS_CTRL);

	else

		writel_relaxed(0x3656, dev->parf + PCIE20_PARF_SYS_CTRL);



	writel_relaxed(0, dev->parf + PCIE20_PARF_Q2A_FLUSH);