Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 89b5cd70 authored by Kuogee Hsieh's avatar Kuogee Hsieh
Browse files

mdss: display: add mdp core clock to edp control 



Since mdss interrupts are generated in mdp core clock domain,
mdp clock need to be enabled along with edp clocks to have edp
interrupt be delivered to edp during edp probe.

Change-Id: Idad19dddfdc2aed9efda15b28b666ac0411dbbda
Signed-off-by: default avatarKuogee Hsieh <khsieh@codeaurora.org>
parent 0cabfa0f

arch/arm/mach-msm/clock-8974.c

+1 −0
Original line number Diff line number Diff line
@@ -4992,6 +4992,7 @@ static struct clk_lookup msm_clocks_8974_common[] __initdata = { 
	CLK_LOOKUP("core_clk", mdss_edpaux_clk.c, "fd923400.qcom,mdss_edp"),

	CLK_LOOKUP("pixel_clk", mdss_edppixel_clk.c, "fd923400.qcom,mdss_edp"),

	CLK_LOOKUP("link_clk", mdss_edplink_clk.c, "fd923400.qcom,mdss_edp"),

	CLK_LOOKUP("mdp_core_clk", mdss_mdp_clk.c, "fd923400.qcom,mdss_edp"),

	CLK_LOOKUP("byte_clk", mdss_byte0_clk.c, "fd922800.qcom,mdss_dsi"),

	CLK_LOOKUP("byte_clk", mdss_byte1_clk.c, "fd922e00.qcom,mdss_dsi"),

	CLK_LOOKUP("core_clk", mdss_esc0_clk.c, "fd922800.qcom,mdss_dsi"),

arch/arm/mach-msm/clock-mdss-8974.c

+0 −1
Original line number Diff line number Diff line
@@ -2019,7 +2019,6 @@ static int edp_pll_ready_poll(void) 
	if (status)

		return 1;



	pr_err("%s: PLL NOT ready\n", __func__);

	return 0;

}

drivers/video/msm/mdss/mdss_edp.c

+0 −13
Original line number Diff line number Diff line
@@ -33,8 +33,6 @@ 
#include <mach/dma.h>



#include "mdss.h"

#include "mdss_panel.h"

#include "mdss_mdp.h"

#include "mdss_edp.h"

#include "mdss_debug.h"
@@ -536,8 +534,6 @@ int mdss_edp_on(struct mdss_panel_data *pdata) 


	pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);



	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);



	if (!edp_drv->cont_splash) { /* vote for clocks */

		mdss_edp_phy_pll_reset(edp_drv);

		mdss_edp_aux_reset(edp_drv);
@@ -626,8 +622,6 @@ int mdss_edp_off(struct mdss_panel_data *pdata) 
	mdss_edp_clk_disable(edp_drv);

	mdss_edp_unprepare_clocks(edp_drv);



	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);



	mdss_edp_aux_ctrl(edp_drv, 0);



	pr_debug("%s-: state_ctrl=%x\n", __func__,
@@ -1091,10 +1085,6 @@ static int mdss_edp_probe(struct platform_device *pdev) 


	pr_debug("%s:cont_splash=%d\n", __func__, edp_drv->cont_splash);



	/* need mdss clock to receive irq */

	if (!edp_drv->cont_splash)

		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);



	/* only need aux and ahb clock for aux channel */

	mdss_edp_prepare_aux_clocks(edp_drv);

	mdss_edp_aux_clk_enable(edp_drv);
@@ -1123,9 +1113,6 @@ static int mdss_edp_probe(struct platform_device *pdev) 
	mdss_edp_aux_clk_disable(edp_drv);

	mdss_edp_unprepare_aux_clocks(edp_drv);



	if (!edp_drv->cont_splash)

		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);



	if (edp_drv->cont_splash) { /* vote for clocks */

		mdss_edp_prepare_clocks(edp_drv);

		mdss_edp_clk_enable(edp_drv);

drivers/video/msm/mdss/mdss_edp.h

+1 −0
Original line number Diff line number Diff line
@@ -293,6 +293,7 @@ struct mdss_edp_drv_pdata { 
	struct clk *pixel_clk;

	struct clk *ahb_clk;

	struct clk *link_clk;

	struct clk *mdp_core_clk;

	int clk_on;



	/* gpios */

drivers/video/msm/mdss/msm_mdss_io_8974.c

+50 −3
Original line number Diff line number Diff line
@@ -723,6 +723,8 @@ void mdss_edp_clk_deinit(struct mdss_edp_drv_pdata *edp_drv) 
		clk_put(edp_drv->ahb_clk);

	if (edp_drv->link_clk)

		clk_put(edp_drv->link_clk);

	if (edp_drv->mdp_core_clk)

		clk_put(edp_drv->mdp_core_clk);

}



int mdss_edp_clk_init(struct mdss_edp_drv_pdata *edp_drv)
@@ -757,6 +759,14 @@ int mdss_edp_clk_init(struct mdss_edp_drv_pdata *edp_drv) 
		goto mdss_edp_clk_err;

	}



	/* need mdss clock to receive irq */

	edp_drv->mdp_core_clk = clk_get(dev, "mdp_core_clk");

	if (IS_ERR(edp_drv->mdp_core_clk)) {

		pr_err("%s: Can't find mdp_core_clk", __func__);

		edp_drv->mdp_core_clk = NULL;

		goto mdss_edp_clk_err;

	}



	return 0;



mdss_edp_clk_err:
@@ -784,7 +794,16 @@ int mdss_edp_aux_clk_enable(struct mdss_edp_drv_pdata *edp_drv) 
		goto c1;

	}



	/* need mdss clock to receive irq */

	ret = clk_enable(edp_drv->mdp_core_clk);

	if (ret) {

		pr_err("%s: Failed to enable mdp_core_clk\n", __func__);

		goto c0;

	}



	return 0;

c0:

	clk_disable(edp_drv->ahb_clk);

c1:

	clk_disable(edp_drv->aux_clk);

c2:
@@ -796,6 +815,7 @@ void mdss_edp_aux_clk_disable(struct mdss_edp_drv_pdata *edp_drv) 
{

	clk_disable(edp_drv->aux_clk);

	clk_disable(edp_drv->ahb_clk);

	clk_disable(edp_drv->mdp_core_clk);

}



int mdss_edp_clk_enable(struct mdss_edp_drv_pdata *edp_drv)
@@ -839,11 +859,18 @@ int mdss_edp_clk_enable(struct mdss_edp_drv_pdata *edp_drv) 
		pr_err("%s: Failed to enable link clk\n", __func__);

		goto c1;

	}

	ret = clk_enable(edp_drv->mdp_core_clk);

	if (ret) {

		pr_err("%s: Failed to enable mdp_core_clk\n", __func__);

		goto c0;

	}



	edp_drv->clk_on = 1;



	return 0;



c0:

	clk_disable(edp_drv->link_clk);

c1:

	clk_disable(edp_drv->ahb_clk);

c2:
@@ -865,6 +892,7 @@ void mdss_edp_clk_disable(struct mdss_edp_drv_pdata *edp_drv) 
	clk_disable(edp_drv->pixel_clk);

	clk_disable(edp_drv->ahb_clk);

	clk_disable(edp_drv->link_clk);

	clk_disable(edp_drv->mdp_core_clk);



	edp_drv->clk_on = 0;

}
@@ -873,10 +901,11 @@ int mdss_edp_prepare_aux_clocks(struct mdss_edp_drv_pdata *edp_drv) 
{

	int ret;



	/* ahb clock should be prepared first */

	ret = clk_prepare(edp_drv->ahb_clk);

	if (ret) {

		pr_err("%s: Failed to prepare ahb clk\n", __func__);

		goto c1;

		goto c3;

	}

	ret = clk_prepare(edp_drv->aux_clk);

	if (ret) {
@@ -884,16 +913,26 @@ int mdss_edp_prepare_aux_clocks(struct mdss_edp_drv_pdata *edp_drv) 
		goto c2;

	}



	/* need mdss clock to receive irq */

	ret = clk_prepare(edp_drv->mdp_core_clk);

	if (ret) {

		pr_err("%s: Failed to prepare mdp_core clk\n", __func__);

		goto c1;

	}



	return 0;

c1:

	clk_unprepare(edp_drv->ahb_clk);

	clk_unprepare(edp_drv->aux_clk);

c2:

	clk_unprepare(edp_drv->ahb_clk);

c3:

	return ret;



}



void mdss_edp_unprepare_aux_clocks(struct mdss_edp_drv_pdata *edp_drv)

{

	clk_unprepare(edp_drv->mdp_core_clk);

	clk_unprepare(edp_drv->aux_clk);

	clk_unprepare(edp_drv->ahb_clk);

}
@@ -902,7 +941,7 @@ int mdss_edp_prepare_clocks(struct mdss_edp_drv_pdata *edp_drv) 
{

	int ret;



	/* ahb clock should be first one to enable */

	/* ahb clock should be prepared first */

	ret = clk_prepare(edp_drv->ahb_clk);

	if (ret) {

		pr_err("%s: Failed to prepare ahb clk\n", __func__);
@@ -923,8 +962,15 @@ int mdss_edp_prepare_clocks(struct mdss_edp_drv_pdata *edp_drv) 
		pr_err("%s: Failed to prepare link clk\n", __func__);

		goto c1;

	}

	ret = clk_prepare(edp_drv->mdp_core_clk);

	if (ret) {

		pr_err("%s: Failed to prepare mdp_core clk\n", __func__);

		goto c0;

	}



	return 0;

c0:

	clk_unprepare(edp_drv->link_clk);

c1:

	clk_unprepare(edp_drv->pixel_clk);

c2:
@@ -937,6 +983,7 @@ c4: 


void mdss_edp_unprepare_clocks(struct mdss_edp_drv_pdata *edp_drv)

{

	clk_unprepare(edp_drv->mdp_core_clk);

	clk_unprepare(edp_drv->aux_clk);

	clk_unprepare(edp_drv->pixel_clk);

	clk_unprepare(edp_drv->link_clk);