Loading drivers/soc/qcom/subsys-pil-tz.c +51 −17 Original line number Diff line number Diff line Loading @@ -556,6 +556,7 @@ static int pil_init_image_trusted(struct pil_desc *pil, int ret; DEFINE_DMA_ATTRS(attrs); struct device dev = {0}; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; Loading @@ -576,11 +577,18 @@ static int pil_init_image_trusted(struct pil_desc *pil, memcpy(mdata_buf, metadata, size); request.proc = d->pas_id; request.image_addr = mdata_phys; desc.args[0] = request.proc = d->pas_id; desc.args[1] = request.image_addr = mdata_phys; desc.arginfo = SCM_ARGS(2, SCM_VAL, SCM_RW); if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD, &request, sizeof(request), &scm_ret, sizeof(scm_ret)); } else { ret = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD), &desc); scm_ret = desc.ret[0]; } dma_free_attrs(&dev, size, mdata_buf, mdata_phys, &attrs); scm_pas_disable_bw(); Loading @@ -600,16 +608,24 @@ static int pil_mem_setup_trusted(struct pil_desc *pil, phys_addr_t addr, } request; u32 scm_ret = 0; int ret; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; request.proc = d->pas_id; request.start_addr = addr; request.len = size; desc.args[0] = request.proc = d->pas_id; desc.args[1] = request.start_addr = addr; desc.args[2] = request.len = size; desc.arginfo = SCM_ARGS(3); if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_PIL, PAS_MEM_SETUP_CMD, &request, sizeof(request), &scm_ret, sizeof(scm_ret)); } else { ret = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_MEM_SETUP_CMD), &desc); scm_ret = desc.ret[0]; } if (ret) return ret; return scm_ret; Loading @@ -620,11 +636,14 @@ static int pil_auth_and_reset(struct pil_desc *pil) struct pil_tz_data *d = desc_to_data(pil); int rc; u32 proc, scm_ret = 0; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; proc = d->pas_id; desc.args[0] = proc = d->pas_id; desc.arginfo = SCM_ARGS(1); rc = enable_regulators(pil->dev, d->regs, d->reg_count); if (rc) return rc; Loading @@ -637,8 +656,14 @@ static int pil_auth_and_reset(struct pil_desc *pil) if (rc) goto err_reset; if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_PIL, PAS_AUTH_AND_RESET_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_AUTH_AND_RESET_CMD), &desc); scm_ret = desc.ret[0]; } scm_pas_disable_bw(); if (rc) goto err_reset; Loading @@ -657,11 +682,14 @@ static int pil_shutdown_trusted(struct pil_desc *pil) struct pil_tz_data *d = desc_to_data(pil); u32 proc, scm_ret = 0; int rc; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; proc = d->pas_id; desc.args[0] = proc = d->pas_id; desc.arginfo = SCM_ARGS(1); rc = enable_regulators(pil->dev, d->proxy_regs, d->proxy_reg_count); if (rc) return rc; Loading @@ -671,8 +699,14 @@ static int pil_shutdown_trusted(struct pil_desc *pil) if (rc) goto err_clks; rc = scm_call(SCM_SVC_PIL, PAS_SHUTDOWN_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_PIL, PAS_SHUTDOWN_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_SHUTDOWN_CMD), &desc); scm_ret = desc.ret[0]; } disable_unprepare_clocks(d->proxy_clks, d->proxy_clk_count); disable_regulators(d->proxy_regs, d->proxy_reg_count); Loading Loading
drivers/soc/qcom/subsys-pil-tz.c +51 −17 Original line number Diff line number Diff line Loading @@ -556,6 +556,7 @@ static int pil_init_image_trusted(struct pil_desc *pil, int ret; DEFINE_DMA_ATTRS(attrs); struct device dev = {0}; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; Loading @@ -576,11 +577,18 @@ static int pil_init_image_trusted(struct pil_desc *pil, memcpy(mdata_buf, metadata, size); request.proc = d->pas_id; request.image_addr = mdata_phys; desc.args[0] = request.proc = d->pas_id; desc.args[1] = request.image_addr = mdata_phys; desc.arginfo = SCM_ARGS(2, SCM_VAL, SCM_RW); if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD, &request, sizeof(request), &scm_ret, sizeof(scm_ret)); } else { ret = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD), &desc); scm_ret = desc.ret[0]; } dma_free_attrs(&dev, size, mdata_buf, mdata_phys, &attrs); scm_pas_disable_bw(); Loading @@ -600,16 +608,24 @@ static int pil_mem_setup_trusted(struct pil_desc *pil, phys_addr_t addr, } request; u32 scm_ret = 0; int ret; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; request.proc = d->pas_id; request.start_addr = addr; request.len = size; desc.args[0] = request.proc = d->pas_id; desc.args[1] = request.start_addr = addr; desc.args[2] = request.len = size; desc.arginfo = SCM_ARGS(3); if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_PIL, PAS_MEM_SETUP_CMD, &request, sizeof(request), &scm_ret, sizeof(scm_ret)); } else { ret = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_MEM_SETUP_CMD), &desc); scm_ret = desc.ret[0]; } if (ret) return ret; return scm_ret; Loading @@ -620,11 +636,14 @@ static int pil_auth_and_reset(struct pil_desc *pil) struct pil_tz_data *d = desc_to_data(pil); int rc; u32 proc, scm_ret = 0; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; proc = d->pas_id; desc.args[0] = proc = d->pas_id; desc.arginfo = SCM_ARGS(1); rc = enable_regulators(pil->dev, d->regs, d->reg_count); if (rc) return rc; Loading @@ -637,8 +656,14 @@ static int pil_auth_and_reset(struct pil_desc *pil) if (rc) goto err_reset; if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_PIL, PAS_AUTH_AND_RESET_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_AUTH_AND_RESET_CMD), &desc); scm_ret = desc.ret[0]; } scm_pas_disable_bw(); if (rc) goto err_reset; Loading @@ -657,11 +682,14 @@ static int pil_shutdown_trusted(struct pil_desc *pil) struct pil_tz_data *d = desc_to_data(pil); u32 proc, scm_ret = 0; int rc; struct scm_desc desc = {0}; if (d->subsys_desc.no_auth) return 0; proc = d->pas_id; desc.args[0] = proc = d->pas_id; desc.arginfo = SCM_ARGS(1); rc = enable_regulators(pil->dev, d->proxy_regs, d->proxy_reg_count); if (rc) return rc; Loading @@ -671,8 +699,14 @@ static int pil_shutdown_trusted(struct pil_desc *pil) if (rc) goto err_clks; rc = scm_call(SCM_SVC_PIL, PAS_SHUTDOWN_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_PIL, PAS_SHUTDOWN_CMD, &proc, sizeof(proc), &scm_ret, sizeof(scm_ret)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL, PAS_SHUTDOWN_CMD), &desc); scm_ret = desc.ret[0]; } disable_unprepare_clocks(d->proxy_clks, d->proxy_clk_count); disable_regulators(d->proxy_regs, d->proxy_reg_count); Loading